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llvm source #1
Output
Compile to binary object
Link to binary
Execute the code
Intel asm syntax
Demangle identifiers
Verbose demangling
Filters
Unused labels
Library functions
Directives
Comments
Horizontal whitespace
Debug intrinsics
Compiler
clang (assertions trunk)
clang (trunk)
clang 10.0.0
clang 10.0.1
clang 11.0.0
clang 11.0.1
clang 12.0.0
clang 12.0.1
clang 13.0.0
clang 14.0.0
clang 15.0.0
clang 16.0.0
clang 17.0.1
clang 18.1.0
clang 19.1.0
clang 4.0.1
clang 5.0.0
clang 6.0.0
clang 7.0.0
clang 8.0.0
clang 9.0.0
llc (assertions trunk)
llc (trunk)
llc 10.0.0
llc 10.0.1
llc 11.0.0
llc 11.0.1
llc 12.0.0
llc 12.0.1
llc 13.0.0
llc 14.0.0
llc 15.0.0
llc 16.0.0
llc 17.0.1
llc 18.1.0
llc 19.1.0
llc 3.2
llc 3.3
llc 3.9.1
llc 4.0.0
llc 4.0.1
llc 5.0.0
llc 6.0.0
llc 7.0.0
llc 8.0.0
llc 9.0.0
opt (assertions trunk)
opt (trunk)
opt 10.0.0
opt 10.0.1
opt 11.0.0
opt 11.0.1
opt 12.0.0
opt 12.0.1
opt 13.0.0
opt 14.0.0
opt 15.0.0
opt 16.0.0
opt 17.0.1
opt 18.1.0
opt 19.1.0
opt 3.2
opt 3.3
opt 3.9.1
opt 4.0.0
opt 4.0.1
opt 5.0.0
opt 6.0.0
opt 7.0.0
opt 8.0.0
opt 9.0.0
Options
Source code
define void @load_i64_stride3_vf16(<48 x i64>* noalias %in.vec, <16 x i64>* noalias %out.vec0, <16 x i64>* noalias %out.vec1, <16 x i64>* noalias %out.vec2) nounwind { %wide.vec = load <48 x i64>, <48 x i64>* %in.vec, align 32 %strided.vec0 = shufflevector <48 x i64> %wide.vec, <48 x i64> poison, <16 x i32> <i32 0, i32 3, i32 6, i32 9, i32 12, i32 15, i32 18, i32 21, i32 24, i32 27, i32 30, i32 33, i32 36, i32 39, i32 42, i32 45> %strided.vec1 = shufflevector <48 x i64> %wide.vec, <48 x i64> poison, <16 x i32> <i32 1, i32 4, i32 7, i32 10, i32 13, i32 16, i32 19, i32 22, i32 25, i32 28, i32 31, i32 34, i32 37, i32 40, i32 43, i32 46> %strided.vec2 = shufflevector <48 x i64> %wide.vec, <48 x i64> poison, <16 x i32> <i32 2, i32 5, i32 8, i32 11, i32 14, i32 17, i32 20, i32 23, i32 26, i32 29, i32 32, i32 35, i32 38, i32 41, i32 44, i32 47> ; call void @f() store <16 x i64> %strided.vec0, <16 x i64>* %out.vec0, align 32 store <16 x i64> %strided.vec1, <16 x i64>* %out.vec1, align 32 store <16 x i64> %strided.vec2, <16 x i64>* %out.vec2, align 32 ret void } declare void @f()
analysis source #2
Output
Compile to binary object
Link to binary
Execute the code
Intel asm syntax
Demangle identifiers
Verbose demangling
Filters
Unused labels
Library functions
Directives
Comments
Horizontal whitespace
Debug intrinsics
Compiler
OSACA (0.6.1)
llvm-mca (assertions trunk)
llvm-mca (trunk)
Options
Source code
vpxor ymm3, ymm3, ymm3 vpxor ymm6, ymm6, ymm6 vpxor ymm5, ymm5, ymm5 vpxor ymm7, ymm7, ymm7 vpxor ymm8, ymm8, ymm8 vpxor ymm9, ymm9, ymm9 vpxor ymm10, ymm10, ymm10 vpxor ymm11, ymm11, ymm11 vinserti128 ymm0, ymm0, xmm0, 1 vpermq ymm1, ymm11, 236 # ymm1 = ymm11[0,3,2,3] vpblendd ymm1, ymm1, ymm10, 48 # ymm1 = ymm1[0,1,2,3],ymm10[4,5],ymm1[6,7] vpblendd ymm13, ymm1, ymm0, 192 # ymm13 = ymm1[0,1,2,3,4,5],ymm0[6,7] vinserti128 ymm1, ymm0, xmm0, 1 vpermq ymm2, ymm9, 236 # ymm2 = ymm9[0,3,2,3] vpblendd ymm2, ymm2, ymm8, 48 # ymm2 = ymm2[0,1,2,3],ymm8[4,5],ymm2[6,7] vpblendd ymm14, ymm2, ymm1, 192 # ymm14 = ymm2[0,1,2,3,4,5],ymm1[6,7] vinserti128 ymm2, ymm0, xmm0, 1 vpermq ymm4, ymm7, 236 # ymm4 = ymm7[0,3,2,3] vpblendd ymm4, ymm4, ymm5, 48 # ymm4 = ymm4[0,1,2,3],ymm5[4,5],ymm4[6,7] vpblendd ymm15, ymm4, ymm2, 192 # ymm15 = ymm4[0,1,2,3,4,5],ymm2[6,7] vinserti128 ymm4, ymm0, xmm0, 1 vpermq ymm12, ymm6, 236 # ymm12 = ymm6[0,3,2,3] vpblendd ymm12, ymm12, ymm3, 48 # ymm12 = ymm12[0,1,2,3],ymm3[4,5],ymm12[6,7] vpblendd ymm4, ymm12, ymm4, 192 # ymm4 = ymm12[0,1,2,3,4,5],ymm4[6,7] vpblendd ymm6, ymm6, ymm3, 240 # ymm6 = ymm6[0,1,2,3],ymm3[4,5,6,7] vpalignr ymm3, ymm3, ymm6, 8 # ymm3 = ymm6[8,9,10,11,12,13,14,15],ymm3[0,1,2,3,4,5,6,7],ymm6[24,25,26,27,28,29,30,31],ymm3[16,17,18,19,20,21,22,23] vbroadcastsd ymm6, xmm6 vpblendd ymm3, ymm3, ymm6, 192 # ymm3 = ymm3[0,1,2,3,4,5],ymm6[6,7] vpblendd ymm6, ymm11, ymm10, 240 # ymm6 = ymm11[0,1,2,3],ymm10[4,5,6,7] vpalignr ymm6, ymm10, ymm6, 8 # ymm6 = ymm6[8,9,10,11,12,13,14,15],ymm10[0,1,2,3,4,5,6,7],ymm6[24,25,26,27,28,29,30,31],ymm10[16,17,18,19,20,21,22,23] vbroadcastsd ymm10, xmm10 vpblendd ymm6, ymm6, ymm10, 192 # ymm6 = ymm6[0,1,2,3,4,5],ymm10[6,7] vpblendd ymm9, ymm9, ymm8, 240 # ymm9 = ymm9[0,1,2,3],ymm8[4,5,6,7] vpalignr ymm8, ymm8, ymm9, 8 # ymm8 = ymm9[8,9,10,11,12,13,14,15],ymm8[0,1,2,3,4,5,6,7],ymm9[24,25,26,27,28,29,30,31],ymm8[16,17,18,19,20,21,22,23] vbroadcastsd ymm9, xmm9 vpblendd ymm8, ymm8, ymm9, 192 # ymm8 = ymm8[0,1,2,3,4,5],ymm9[6,7] vpblendd ymm7, ymm7, ymm5, 240 # ymm7 = ymm7[0,1,2,3],ymm5[4,5,6,7] vpalignr ymm5, ymm5, ymm7, 8 # ymm5 = ymm7[8,9,10,11,12,13,14,15],ymm5[0,1,2,3,4,5,6,7],ymm7[24,25,26,27,28,29,30,31],ymm5[16,17,18,19,20,21,22,23] vbroadcastsd ymm7, xmm7 vpblendd ymm5, ymm5, ymm7, 192 # ymm5 = ymm5[0,1,2,3,4,5],ymm7[6,7] vpxor xmm7, xmm7, xmm7 vblendps xmm7, xmm7, xmm7, 12 # xmm7 = xmm7[0,1],mem[2,3] vpermpd ymm9, ymm9, 196 # ymm9 = mem[0,1,0,3] vblendps ymm7, ymm7, ymm9, 240 # ymm7 = ymm7[0,1,2,3],ymm9[4,5,6,7] vpxor xmm0, xmm0, xmm0 vblendps xmm0, xmm0, xmm0, 12 # xmm0 = xmm0[0,1],mem[2,3] vpermpd ymm9, ymm9, 196 # ymm9 = mem[0,1,0,3] vblendps ymm0, ymm0, ymm9, 240 # ymm0 = ymm0[0,1,2,3],ymm9[4,5,6,7] vpxor xmm1, xmm1, xmm1 vblendps xmm1, xmm1, xmm1, 12 # xmm1 = xmm1[0,1],mem[2,3] vpermpd ymm9, ymm9, 196 # ymm9 = mem[0,1,0,3] vblendps ymm1, ymm1, ymm9, 240 # ymm1 = ymm1[0,1,2,3],ymm9[4,5,6,7] vpxor xmm2, xmm2, xmm2 vblendps xmm2, xmm2, xmm2, 12 # xmm2 = xmm2[0,1],mem[2,3] vpermpd ymm9, ymm9, 196 # ymm9 = mem[0,1,0,3] vblendps ymm2, ymm2, ymm9, 240 # ymm2 = ymm2[0,1,2,3],ymm9[4,5,6,7]
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