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c++ source #1
Output
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Intel asm syntax
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Filters
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Debug intrinsics
Compiler
6502-c++ 11.1.0
ARM GCC 10.2.0
ARM GCC 10.3.0
ARM GCC 10.4.0
ARM GCC 10.5.0
ARM GCC 11.1.0
ARM GCC 11.2.0
ARM GCC 11.3.0
ARM GCC 11.4.0
ARM GCC 12.1.0
ARM GCC 12.2.0
ARM GCC 12.3.0
ARM GCC 13.1.0
ARM GCC 13.2.0
ARM GCC 13.2.0 (unknown-eabi)
ARM GCC 14.1.0
ARM GCC 4.5.4
ARM GCC 4.6.4
ARM GCC 5.4
ARM GCC 6.3.0
ARM GCC 6.4.0
ARM GCC 7.3.0
ARM GCC 7.5.0
ARM GCC 8.2.0
ARM GCC 8.5.0
ARM GCC 9.3.0
ARM GCC 9.4.0
ARM GCC 9.5.0
ARM GCC trunk
ARM gcc 10.2.1 (none)
ARM gcc 10.3.1 (2021.07 none)
ARM gcc 10.3.1 (2021.10 none)
ARM gcc 11.2.1 (none)
ARM gcc 5.4.1 (none)
ARM gcc 7.2.1 (none)
ARM gcc 8.2 (WinCE)
ARM gcc 8.3.1 (none)
ARM gcc 9.2.1 (none)
ARM msvc v19.0 (WINE)
ARM msvc v19.10 (WINE)
ARM msvc v19.14 (WINE)
ARM64 Morello gcc 10.1 Alpha 2
ARM64 gcc 10.2
ARM64 gcc 10.3
ARM64 gcc 10.4
ARM64 gcc 10.5.0
ARM64 gcc 11.1
ARM64 gcc 11.2
ARM64 gcc 11.3
ARM64 gcc 11.4.0
ARM64 gcc 12.1
ARM64 gcc 12.2.0
ARM64 gcc 12.3.0
ARM64 gcc 13.1.0
ARM64 gcc 13.2.0
ARM64 gcc 14.1.0
ARM64 gcc 4.9.4
ARM64 gcc 5.4
ARM64 gcc 5.5.0
ARM64 gcc 6.3
ARM64 gcc 6.4
ARM64 gcc 7.3
ARM64 gcc 7.5
ARM64 gcc 8.2
ARM64 gcc 8.5
ARM64 gcc 9.3
ARM64 gcc 9.4
ARM64 gcc 9.5
ARM64 gcc trunk
ARM64 msvc v19.14 (WINE)
AVR gcc 10.3.0
AVR gcc 11.1.0
AVR gcc 12.1.0
AVR gcc 12.2.0
AVR gcc 12.3.0
AVR gcc 13.1.0
AVR gcc 13.2.0
AVR gcc 14.1.0
AVR gcc 4.5.4
AVR gcc 4.6.4
AVR gcc 5.4.0
AVR gcc 9.2.0
AVR gcc 9.3.0
Arduino Mega (1.8.9)
Arduino Uno (1.8.9)
BPF clang (trunk)
BPF clang 13.0.0
BPF clang 14.0.0
BPF clang 15.0.0
BPF clang 16.0.0
BPF clang 17.0.1
BPF clang 18.1.0
BPF gcc 13.1.0
BPF gcc 13.2.0
BPF gcc trunk
EDG (experimental reflection)
EDG 6.5
EDG 6.5 (GNU mode gcc 13)
EDG 6.6
EDG 6.6 (GNU mode gcc 13)
FRC 2019
FRC 2020
FRC 2023
KVX ACB 4.1.0 (GCC 7.5.0)
KVX ACB 4.1.0-cd1 (GCC 7.5.0)
KVX ACB 4.10.0 (GCC 10.3.1)
KVX ACB 4.11.1 (GCC 10.3.1)
KVX ACB 4.12.0 (GCC 11.3.0)
KVX ACB 4.2.0 (GCC 7.5.0)
KVX ACB 4.3.0 (GCC 7.5.0)
KVX ACB 4.4.0 (GCC 7.5.0)
KVX ACB 4.6.0 (GCC 9.4.1)
KVX ACB 4.8.0 (GCC 9.4.1)
KVX ACB 4.9.0 (GCC 9.4.1)
KVX ACB 5.0.0 (GCC 12.2.1)
M68K gcc 13.1.0
M68K gcc 13.2.0
M68K gcc 14.1.0
M68k clang (trunk)
MRISC32 gcc (trunk)
MSP430 gcc 4.5.3
MSP430 gcc 5.3.0
MSP430 gcc 6.2.1
MinGW clang 14.0.3
MinGW clang 14.0.6
MinGW clang 15.0.7
MinGW clang 16.0.0
MinGW clang 16.0.2
MinGW gcc 11.3.0
MinGW gcc 12.1.0
MinGW gcc 12.2.0
MinGW gcc 13.1.0
RISC-V (32-bits) gcc (trunk)
RISC-V (32-bits) gcc 10.2.0
RISC-V (32-bits) gcc 10.3.0
RISC-V (32-bits) gcc 11.2.0
RISC-V (32-bits) gcc 11.3.0
RISC-V (32-bits) gcc 11.4.0
RISC-V (32-bits) gcc 12.1.0
RISC-V (32-bits) gcc 12.2.0
RISC-V (32-bits) gcc 12.3.0
RISC-V (32-bits) gcc 13.1.0
RISC-V (32-bits) gcc 13.2.0
RISC-V (32-bits) gcc 14.1.0
RISC-V (32-bits) gcc 8.2.0
RISC-V (32-bits) gcc 8.5.0
RISC-V (32-bits) gcc 9.4.0
RISC-V (64-bits) gcc (trunk)
RISC-V (64-bits) gcc 10.2.0
RISC-V (64-bits) gcc 10.3.0
RISC-V (64-bits) gcc 11.2.0
RISC-V (64-bits) gcc 11.3.0
RISC-V (64-bits) gcc 11.4.0
RISC-V (64-bits) gcc 12.1.0
RISC-V (64-bits) gcc 12.2.0
RISC-V (64-bits) gcc 12.3.0
RISC-V (64-bits) gcc 13.1.0
RISC-V (64-bits) gcc 13.2.0
RISC-V (64-bits) gcc 14.1.0
RISC-V (64-bits) gcc 8.2.0
RISC-V (64-bits) gcc 8.5.0
RISC-V (64-bits) gcc 9.4.0
RISC-V rv32gc clang (trunk)
RISC-V rv32gc clang 10.0.0
RISC-V rv32gc clang 10.0.1
RISC-V rv32gc clang 11.0.0
RISC-V rv32gc clang 11.0.1
RISC-V rv32gc clang 12.0.0
RISC-V rv32gc clang 12.0.1
RISC-V rv32gc clang 13.0.0
RISC-V rv32gc clang 13.0.1
RISC-V rv32gc clang 14.0.0
RISC-V rv32gc clang 15.0.0
RISC-V rv32gc clang 16.0.0
RISC-V rv32gc clang 17.0.1
RISC-V rv32gc clang 18.1.0
RISC-V rv32gc clang 9.0.0
RISC-V rv32gc clang 9.0.1
RISC-V rv64gc clang (trunk)
RISC-V rv64gc clang 10.0.0
RISC-V rv64gc clang 10.0.1
RISC-V rv64gc clang 11.0.0
RISC-V rv64gc clang 11.0.1
RISC-V rv64gc clang 12.0.0
RISC-V rv64gc clang 12.0.1
RISC-V rv64gc clang 13.0.0
RISC-V rv64gc clang 13.0.1
RISC-V rv64gc clang 14.0.0
RISC-V rv64gc clang 15.0.0
RISC-V rv64gc clang 16.0.0
RISC-V rv64gc clang 17.0.1
RISC-V rv64gc clang 18.1.0
RISC-V rv64gc clang 9.0.0
RISC-V rv64gc clang 9.0.1
Raspbian Buster
Raspbian Stretch
SPARC LEON gcc 12.2.0
SPARC LEON gcc 12.3.0
SPARC LEON gcc 13.1.0
SPARC LEON gcc 13.2.0
SPARC gcc 12.2.0
SPARC gcc 12.3.0
SPARC gcc 13.1.0
SPARC gcc 13.2.0
SPARC gcc 14.1.0
SPARC64 gcc 12.2.0
SPARC64 gcc 12.3.0
SPARC64 gcc 13.1.0
SPARC64 gcc 13.2.0
SPARC64 gcc 14.1.0
TI C6x gcc 12.2.0
TI C6x gcc 12.3.0
TI C6x gcc 13.1.0
TI C6x gcc 13.2.0
TI C6x gcc 14.1.0
TI CL430 21.6.1
VAX gcc NetBSDELF 10.4.0
VAX gcc NetBSDELF 10.5.0 (Nov 15 03:50:22 2023)
WebAssembly clang (trunk)
Xtensa ESP32 gcc 11.2.0 (2022r1)
Xtensa ESP32 gcc 12.2.0 (20230208)
Xtensa ESP32 gcc 8.2.0 (2019r2)
Xtensa ESP32 gcc 8.2.0 (2020r1)
Xtensa ESP32 gcc 8.2.0 (2020r2)
Xtensa ESP32 gcc 8.4.0 (2020r3)
Xtensa ESP32 gcc 8.4.0 (2021r1)
Xtensa ESP32 gcc 8.4.0 (2021r2)
Xtensa ESP32-S2 gcc 11.2.0 (2022r1)
Xtensa ESP32-S2 gcc 12.2.0 (20230208)
Xtensa ESP32-S2 gcc 8.2.0 (2019r2)
Xtensa ESP32-S2 gcc 8.2.0 (2020r1)
Xtensa ESP32-S2 gcc 8.2.0 (2020r2)
Xtensa ESP32-S2 gcc 8.4.0 (2020r3)
Xtensa ESP32-S2 gcc 8.4.0 (2021r1)
Xtensa ESP32-S2 gcc 8.4.0 (2021r2)
Xtensa ESP32-S3 gcc 11.2.0 (2022r1)
Xtensa ESP32-S3 gcc 12.2.0 (20230208)
Xtensa ESP32-S3 gcc 8.4.0 (2020r3)
Xtensa ESP32-S3 gcc 8.4.0 (2021r1)
Xtensa ESP32-S3 gcc 8.4.0 (2021r2)
arm64 msvc v19.28 VS16.9
arm64 msvc v19.29 VS16.10
arm64 msvc v19.29 VS16.11
arm64 msvc v19.30
arm64 msvc v19.31
arm64 msvc v19.32
arm64 msvc v19.33
arm64 msvc v19.34
arm64 msvc v19.35
arm64 msvc v19.36
arm64 msvc v19.37
arm64 msvc v19.38
arm64 msvc v19.latest
armv7-a clang (trunk)
armv7-a clang 10.0.0
armv7-a clang 10.0.1
armv7-a clang 11.0.0
armv7-a clang 11.0.1
armv7-a clang 12.0.0
armv7-a clang 12.0.1
armv7-a clang 13.0.0
armv7-a clang 13.0.1
armv7-a clang 14.0.0
armv7-a clang 15.0.0
armv7-a clang 16.0.0
armv7-a clang 17.0.1
armv7-a clang 18.1.0
armv7-a clang 9.0.0
armv7-a clang 9.0.1
armv8-a clang (all architectural features, trunk)
armv8-a clang (trunk)
armv8-a clang 10.0.0
armv8-a clang 10.0.1
armv8-a clang 11.0.0
armv8-a clang 11.0.1
armv8-a clang 12.0.0
armv8-a clang 13.0.0
armv8-a clang 14.0.0
armv8-a clang 15.0.0
armv8-a clang 16.0.0
armv8-a clang 17.0.1
armv8-a clang 18.1.0
armv8-a clang 9.0.0
armv8-a clang 9.0.1
ellcc 0.1.33
ellcc 0.1.34
ellcc 2017-07-16
hexagon-clang 16.0.5
llvm-mos atari2600-3e
llvm-mos atari2600-4k
llvm-mos atari2600-common
llvm-mos atari5200-supercart
llvm-mos atari8-cart-megacart
llvm-mos atari8-cart-std
llvm-mos atari8-cart-xegs
llvm-mos atari8-common
llvm-mos atari8-dos
llvm-mos c128
llvm-mos c64
llvm-mos commodore
llvm-mos cpm65
llvm-mos cx16
llvm-mos dodo
llvm-mos eater
llvm-mos mega65
llvm-mos nes
llvm-mos nes-action53
llvm-mos nes-cnrom
llvm-mos nes-gtrom
llvm-mos nes-mmc1
llvm-mos nes-mmc3
llvm-mos nes-nrom
llvm-mos nes-unrom
llvm-mos nes-unrom-512
llvm-mos osi-c1p
llvm-mos pce
llvm-mos pce-cd
llvm-mos pce-common
llvm-mos pet
llvm-mos rp6502
llvm-mos rpc8e
llvm-mos supervision
llvm-mos vic20
loongarch64 gcc 12.2.0
loongarch64 gcc 12.3.0
loongarch64 gcc 13.1.0
loongarch64 gcc 13.2.0
loongarch64 gcc 14.1.0
mips clang 13.0.0
mips clang 14.0.0
mips clang 15.0.0
mips clang 16.0.0
mips clang 17.0.1
mips clang 18.1.0
mips gcc 11.2.0
mips gcc 12.1.0
mips gcc 12.2.0
mips gcc 12.3.0
mips gcc 13.1.0
mips gcc 13.2.0
mips gcc 14.1.0
mips gcc 4.9.4
mips gcc 5.4
mips gcc 5.5.0
mips gcc 9.3.0 (codescape)
mips gcc 9.5.0
mips64 (el) gcc 12.1.0
mips64 (el) gcc 12.2.0
mips64 (el) gcc 12.3.0
mips64 (el) gcc 13.1.0
mips64 (el) gcc 13.2.0
mips64 (el) gcc 14.1.0
mips64 (el) gcc 4.9.4
mips64 (el) gcc 5.4.0
mips64 (el) gcc 5.5.0
mips64 (el) gcc 9.5.0
mips64 clang 13.0.0
mips64 clang 14.0.0
mips64 clang 15.0.0
mips64 clang 16.0.0
mips64 clang 17.0.1
mips64 clang 18.1.0
mips64 gcc 11.2.0
mips64 gcc 12.1.0
mips64 gcc 12.2.0
mips64 gcc 12.3.0
mips64 gcc 13.1.0
mips64 gcc 13.2.0
mips64 gcc 14.1.0
mips64 gcc 4.9.4
mips64 gcc 5.4.0
mips64 gcc 5.5.0
mips64 gcc 9.5.0
mips64el clang 13.0.0
mips64el clang 14.0.0
mips64el clang 15.0.0
mips64el clang 16.0.0
mips64el clang 17.0.1
mips64el clang 18.1.0
mipsel clang 13.0.0
mipsel clang 14.0.0
mipsel clang 15.0.0
mipsel clang 16.0.0
mipsel clang 17.0.1
mipsel clang 18.1.0
mipsel gcc 12.1.0
mipsel gcc 12.2.0
mipsel gcc 12.3.0
mipsel gcc 13.1.0
mipsel gcc 13.2.0
mipsel gcc 14.1.0
mipsel gcc 4.9.4
mipsel gcc 5.4.0
mipsel gcc 5.5.0
mipsel gcc 9.5.0
nanoMIPS gcc 6.3.0 (mtk)
power gcc 11.2.0
power gcc 12.1.0
power gcc 12.2.0
power gcc 12.3.0
power gcc 13.1.0
power gcc 13.2.0
power gcc 14.1.0
power gcc 4.8.5
power64 AT12.0 (gcc8)
power64 AT13.0 (gcc9)
power64 gcc 11.2.0
power64 gcc 12.1.0
power64 gcc 12.2.0
power64 gcc 12.3.0
power64 gcc 13.1.0
power64 gcc 13.2.0
power64 gcc 14.1.0
power64 gcc trunk
power64le AT12.0 (gcc8)
power64le AT13.0 (gcc9)
power64le clang (trunk)
power64le gcc 11.2.0
power64le gcc 12.1.0
power64le gcc 12.2.0
power64le gcc 12.3.0
power64le gcc 13.1.0
power64le gcc 13.2.0
power64le gcc 14.1.0
power64le gcc 6.3.0
power64le gcc trunk
powerpc64 clang (trunk)
s390x gcc 11.2.0
s390x gcc 12.1.0
s390x gcc 12.2.0
s390x gcc 12.3.0
s390x gcc 13.1.0
s390x gcc 13.2.0
s390x gcc 14.1.0
sh gcc 12.2.0
sh gcc 12.3.0
sh gcc 13.1.0
sh gcc 13.2.0
sh gcc 14.1.0
sh gcc 4.9.4
sh gcc 9.5.0
vast (trunk)
x64 msvc v19.0 (WINE)
x64 msvc v19.10 (WINE)
x64 msvc v19.14
x64 msvc v19.14 (WINE)
x64 msvc v19.15
x64 msvc v19.16
x64 msvc v19.20
x64 msvc v19.21
x64 msvc v19.22
x64 msvc v19.23
x64 msvc v19.24
x64 msvc v19.25
x64 msvc v19.26
x64 msvc v19.27
x64 msvc v19.28
x64 msvc v19.28 VS16.9
x64 msvc v19.29 VS16.10
x64 msvc v19.29 VS16.11
x64 msvc v19.30
x64 msvc v19.31
x64 msvc v19.32
x64 msvc v19.33
x64 msvc v19.34
x64 msvc v19.35
x64 msvc v19.36
x64 msvc v19.37
x64 msvc v19.38
x64 msvc v19.latest
x86 djgpp 4.9.4
x86 djgpp 5.5.0
x86 djgpp 6.4.0
x86 djgpp 7.2.0
x86 msvc v19.0 (WINE)
x86 msvc v19.10 (WINE)
x86 msvc v19.14
x86 msvc v19.14 (WINE)
x86 msvc v19.15
x86 msvc v19.16
x86 msvc v19.20
x86 msvc v19.21
x86 msvc v19.22
x86 msvc v19.23
x86 msvc v19.24
x86 msvc v19.25
x86 msvc v19.26
x86 msvc v19.27
x86 msvc v19.28
x86 msvc v19.28 VS16.9
x86 msvc v19.29 VS16.10
x86 msvc v19.29 VS16.11
x86 msvc v19.30
x86 msvc v19.31
x86 msvc v19.32
x86 msvc v19.33
x86 msvc v19.34
x86 msvc v19.35
x86 msvc v19.36
x86 msvc v19.37
x86 msvc v19.38
x86 msvc v19.latest
x86 nvc++ 22.11
x86 nvc++ 22.7
x86 nvc++ 22.9
x86 nvc++ 23.1
x86 nvc++ 23.11
x86 nvc++ 23.3
x86 nvc++ 23.5
x86 nvc++ 23.7
x86 nvc++ 23.9
x86 nvc++ 24.1
x86 nvc++ 24.3
x86-64 Zapcc 190308
x86-64 clang (amd-stg-open)
x86-64 clang (assertions trunk)
x86-64 clang (clangir)
x86-64 clang (experimental -Wlifetime)
x86-64 clang (experimental P1061)
x86-64 clang (experimental P1144)
x86-64 clang (experimental P1221)
x86-64 clang (experimental P2996)
x86-64 clang (experimental P3068)
x86-64 clang (experimental metaprogramming - P2632)
x86-64 clang (experimental pattern matching)
x86-64 clang (old concepts branch)
x86-64 clang (reflection)
x86-64 clang (resugar)
x86-64 clang (thephd.dev)
x86-64 clang (trunk)
x86-64 clang (variadic friends - P2893)
x86-64 clang (widberg)
x86-64 clang 10.0.0
x86-64 clang 10.0.0 (assertions)
x86-64 clang 10.0.1
x86-64 clang 11.0.0
x86-64 clang 11.0.0 (assertions)
x86-64 clang 11.0.1
x86-64 clang 12.0.0
x86-64 clang 12.0.0 (assertions)
x86-64 clang 12.0.1
x86-64 clang 13.0.0
x86-64 clang 13.0.0 (assertions)
x86-64 clang 13.0.1
x86-64 clang 14.0.0
x86-64 clang 14.0.0 (assertions)
x86-64 clang 15.0.0
x86-64 clang 15.0.0 (assertions)
x86-64 clang 16.0.0
x86-64 clang 16.0.0 (assertions)
x86-64 clang 17.0.1
x86-64 clang 17.0.1 (assertions)
x86-64 clang 18.1.0
x86-64 clang 18.1.0 (assertions)
x86-64 clang 2.6.0 (assertions)
x86-64 clang 2.7.0 (assertions)
x86-64 clang 2.8.0 (assertions)
x86-64 clang 2.9.0 (assertions)
x86-64 clang 3.0.0
x86-64 clang 3.0.0 (assertions)
x86-64 clang 3.1
x86-64 clang 3.1 (assertions)
x86-64 clang 3.2
x86-64 clang 3.2 (assertions)
x86-64 clang 3.3
x86-64 clang 3.3 (assertions)
x86-64 clang 3.4 (assertions)
x86-64 clang 3.4.1
x86-64 clang 3.5
x86-64 clang 3.5 (assertions)
x86-64 clang 3.5.1
x86-64 clang 3.5.2
x86-64 clang 3.6
x86-64 clang 3.6 (assertions)
x86-64 clang 3.7
x86-64 clang 3.7 (assertions)
x86-64 clang 3.7.1
x86-64 clang 3.8
x86-64 clang 3.8 (assertions)
x86-64 clang 3.8.1
x86-64 clang 3.9.0
x86-64 clang 3.9.0 (assertions)
x86-64 clang 3.9.1
x86-64 clang 4.0.0
x86-64 clang 4.0.0 (assertions)
x86-64 clang 4.0.1
x86-64 clang 5.0.0
x86-64 clang 5.0.0 (assertions)
x86-64 clang 5.0.1
x86-64 clang 5.0.2
x86-64 clang 6.0.0
x86-64 clang 6.0.0 (assertions)
x86-64 clang 6.0.1
x86-64 clang 7.0.0
x86-64 clang 7.0.0 (assertions)
x86-64 clang 7.0.1
x86-64 clang 7.1.0
x86-64 clang 8.0.0
x86-64 clang 8.0.0 (assertions)
x86-64 clang 8.0.1
x86-64 clang 9.0.0
x86-64 clang 9.0.0 (assertions)
x86-64 clang 9.0.1
x86-64 clang rocm-4.5.2
x86-64 clang rocm-5.0.2
x86-64 clang rocm-5.1.3
x86-64 clang rocm-5.2.3
x86-64 clang rocm-5.3.3
x86-64 clang rocm-5.7.0
x86-64 gcc (contract labels)
x86-64 gcc (contracts natural syntax)
x86-64 gcc (contracts)
x86-64 gcc (coroutines)
x86-64 gcc (modules)
x86-64 gcc (trunk)
x86-64 gcc 10.1
x86-64 gcc 10.2
x86-64 gcc 10.3
x86-64 gcc 10.4
x86-64 gcc 10.5
x86-64 gcc 11.1
x86-64 gcc 11.2
x86-64 gcc 11.3
x86-64 gcc 11.4
x86-64 gcc 12.1
x86-64 gcc 12.2
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#if 0 //linker_script.ld //shown here and commented out only so can see this puzzle piece /*------------------------------------------------------------------------------ * nRF52810 *----------------------------------------------------------------------------*/ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) SEARCH_DIR(.) MEMORY { rom (rx) : ORIGIN = 0x00000000, LENGTH = 192K ram (rwx) : ORIGIN = 0x20000000, LENGTH = 24K } /* adjust sizes as needed */ STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x0200; HEAP_SIZE = DEFINED(HEAP_SIZE) ? HEAP_SIZE : DEFINED(__heap_size__) ? __heap_size__ : 0; /* set vector size for ram vector, 16 + 0-29 */ VECTORS_SIZE = (16 + 30) *4; SECTIONS { .text : { . = ALIGN(4); _sfixed = .; KEEP(*(.vectors .vectors.*)) *(.text .text.* .gnu.linkonce.t.*) *(.glue_7t) *(.glue_7) *(.rodata .rodata* .gnu.linkonce.r.*) *(.ARM.extab* .gnu.linkonce.armextab.*) /* C/C++ constructors/destructors in both user code */ . = ALIGN(4); KEEP(*(.init)) . = ALIGN(4); __preinit_array_start = .; KEEP (*(.preinit_array)) __preinit_array_end = .; . = ALIGN(4); __init_array_start = .; KEEP (*(SORT(.init_array.*))) KEEP (*(.init_array)) __init_array_end = .; . = ALIGN(4); KEEP (*crtbegin.o(.ctors)) KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*crtend.o(.ctors)) . = ALIGN(4); KEEP(*(.fini)) . = ALIGN(4); __fini_array_start = .; KEEP (*(.fini_array)) KEEP (*(SORT(.fini_array.*))) __fini_array_end = .; KEEP (*crtbegin.o(.dtors)) KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) KEEP (*(SORT(.dtors.*))) KEEP (*crtend.o(.dtors)) . = ALIGN(4); _efixed = .; } > rom /* .ARM.exidx is sorted, so has to go in its own output section. */ PROVIDE_HIDDEN (__exidx_start = .); .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } > rom PROVIDE_HIDDEN (__exidx_end = .); . = ALIGN(4); _etext = .; /* added to set aside ram for vector table at start of ram */ .ramvector : { _sramvector = .; . = . + VECTORS_SIZE; _eramvector = .; } > ram /* added to set aside ram at fixed address for debug use */ .ramdebug : { _sramdebug = .; . = . + 32*4; _eramdebug = .; } > ram /* initialized data */ .relocate : AT (_etext) { . = ALIGN(4); _srelocate = .; *(.ramfunc .ramfunc.*); *(.data .data.*); . = ALIGN(4); _erelocate = .; } > ram /* zeroed data */ .bss (NOLOAD) : { . = ALIGN(4); _sbss = . ; _szero = .; *(.bss .bss.*) *(COMMON) . = ALIGN(4); _ebss = . ; _ezero = .; } > ram /* noinit data */ .noinit (NOLOAD) : { . = ALIGN(2); _snoinit = .; *(.noinit) . = ALIGN(2); _enoinit = .; } > ram /* heap */ .heap (NOLOAD): { . = ALIGN(8); _sheap = .; end = .; /* sbrk uses end */ . = . + HEAP_SIZE; . = ALIGN(8); _eheap = .; } > ram /* stack */ .stack (NOLOAD): { . = ALIGN(8); _sstack = .; . = ALIGN(8); } > ram /* check if enough stack space remains for what was requested */ _estack = ORIGIN(ram) + LENGTH(ram); ASSERT( (_estack - _sstack) > STACK_SIZE, "linker- not enough stack space for STACK_SIZE") } #endif //startup.cpp //startup file for nRF52810 //no other includes needed /*----------------------------------------------------------------------------- types and defines -----------------------------------------------------------------------------*/ using u32 = unsigned int; using i32 = int; using u16 = unsigned short; using i16 = short; using flashVectorT = struct { u32* stackTop; void(*vfunc[3])(); }; #define IIA [[ gnu::always_inline ]] inline static auto /*----------------------------------------------------------------------------- vars and constants .ramvector section added to linker script, the section starts at the first location in ram so is aligned properly, _sramvector/_eramvector values added so we can init ram vector table in this startup code .debugram section added to linker script so we can have some ram at a known/fixed location to put debug info in when needed ( like for exceptions) symbols declared as an array as it seems the most flexible and easy to deal with (can be treated as a pointer or array, and we get its address without & and can use as an array without array-bounds warnings) -----------------------------------------------------------------------------*/ //linker script symbols extern u32 _etext []; //end of text extern u32 _sramdebug []; //ram set aside for debug use extern u32 _eramdebug []; extern u32 _sramvector []; //start of ram vector extern u32 _eramvector []; extern u32 _srelocate []; //data (initialized) extern u32 _erelocate []; extern u32 _szero []; //bss (zeroed) extern u32 _ezero []; extern u32 _estack []; //stack address //setup linker symbols with nicer names static constexpr auto dataFlashStart { _etext }; static constexpr auto ramvectorStart { _sramvector }; static constexpr auto ramvectorEnd { _eramvector }; static constexpr auto debugramStart { _sramdebug }; static constexpr auto debugramEnd { _eramdebug }; static constexpr auto dataStart { _srelocate }; static constexpr auto dataEnd { _erelocate }; static constexpr auto bssStart { _szero }; static constexpr auto bssEnd { _ezero }; static constexpr auto stackTop { _estack }; //SCB.VTOR (vector table offset), SCB.AIRCR (for swReset) static volatile auto& VTOR { *(volatile u32*)0xE000ED08 }; static volatile auto& AIRCR { *(volatile u32*)0xE000ED0C }; //for delay functions static constexpr u32 FCPU_MHZ {32}; //32MHz at reset static constexpr u32 CYCLES_PER_LOOP {4}; /*----------------------------------------------------------------------------- function declarations -----------------------------------------------------------------------------*/ int main(); static void resetFunc(); static void errorFunc(); extern "C" void __libc_init_array(); /*----------------------------------------------------------------------------- reset vector block, 4 words - stack value, reset handler/nmi/hardfault addresses ram will be used for vector table, so only need these 4 (really only need reset handler address, but if hardfault takes place between reset and setting vtor we will end up in a known location- errorFunc) section is KEEP in linker script, 'used' keeps compiler from complaining -----------------------------------------------------------------------------*/ [[ using gnu : section(".vectors"), used ]] flashVectorT flashVector{ stackTop, {resetFunc, errorFunc, errorFunc } }; /*----------------------------------------------------------------------------- functions -----------------------------------------------------------------------------*/ #pragma GCC push_options #pragma GCC optimize ("-Os") IIA delayCycles (volatile u32 n) { while( n -= CYCLES_PER_LOOP, n >= CYCLES_PER_LOOP ){} } IIA delayMS (u16 ms){ delayCycles(FCPU_MHZ*1000*ms); } #pragma GCC pop_options IIA //start address, end address, value setmem (u32* s, u32* e, u32 v) { while(s < e) *s++ = v; } IIA //start address, end address, values cpymem (u32* s, u32* e, u32* v) { while(s < e) *s++ = *v++; } //software reset [[ using gnu : used, noreturn ]] static void swReset () { asm( "dsb 0xF":::"memory"); AIRCR = 0x05FA0004; asm( "dsb 0xF":::"memory"); while( true ){} } //unhandled interrupt, exception, or return from main [[ using gnu : used, noreturn ]] static void errorFunc () { //get main stack pointer, get the 8 stack entries which //were possibly set by exception (r0-r3,r12,lr,pc,xpsr) //and copy to debug ram u32* msp; u32* ram = debugramStart; asm( "MRS %0, msp" : "=r" (msp) ); for( auto i = 0; i < 8; i++ ) *ram++ = *msp++; //other data can be saved if wanted (22 more u32's available) //then software reset swReset(); } IIA initRamDebug () { //if last debug ram not set to key value, //clear debug ram and set to key value if( debugramEnd[-1] != 0x12345678 ) { setmem( debugramStart, debugramEnd, 0 ); debugramEnd[-1] = 0x12345678; } //else inc reset count, and leave debug ram as-is //(may be exception data stored we want to see later) else debugramEnd[-2]++; } IIA initRamVectors () { //set all ram vectors to default function (errorFunc) setmem( &ramvectorStart[2], ramvectorEnd, (u32)errorFunc ); //set stack/reset in case code uses vtor to read these values //(they are in flash, so should rad from there if needed, but...) ramvectorStart[0] = (u32)stackTop; ramvectorStart[1] = (u32)resetFunc; //move vectors to ram VTOR = (u32)ramvectorStart; } IIA initRamData () { //init data from flash cpymem( dataStart, dataEnd, dataFlashStart ); //clear bss setmem( bssStart, bssEnd, 0 ); } IIA initRam () { initRamDebug(); initRamVectors(); initRamData(); } [[ using gnu : used, noreturn ]] static void resetFunc () { delayMS(5000); //allow time to allow swd hot-plug initRam(); //ram vectors, normal data/bss init, etc. __libc_init_array(); //libc init, c++ constructors, etc. //C++ will not allow using main with pendatic on, so disable pedantic #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Wpedantic" main(); #pragma GCC diagnostic pop //should not return from main, so treat as an error errorFunc(); } // #pragma once //common includes #include <cstdbool> #include <cstdint> //common function types #define SA static auto #define SCA static constexpr auto #define SI static inline using u8 = uint8_t; using i8 = int8_t; using u16 = uint16_t; using i16 = int16_t; // using u32 = uint32_t; // using i32 = int32_t; using u64 = uint64_t; using i64 = int64_t; /*------------------------------------------------------------------------------ nRF52810 PIN values for mcu - port[5], pin[4:0] ------------------------------------------------------------------------------*/ namespace GPIO { enum PIN { P0_0, P0_1, P0_2, P0_3, P0_4, P0_5, P0_6, P0_7, P0_8, P0_9, P0_10,P0_11,P0_12,P0_13,P0_14,P0_15, P0_16,P0_17,P0_18,P0_19,P0_20,P0_21,P0_22,P0_23, P0_24,P0_25,P0_26,P0_27,P0_28,P0_29,P0_30,P0_31 }; } /*------------------------------------------------------------------------------ GPIO namespace, for pin properties (mcu pins are in mcu specific GPIO::PIN enum) ------------------------------------------------------------------------------*/ namespace GPIO { enum INVERT { HIGHISON, LOWISON }; enum MODE { INPUT, OUTPUT, ANALOG }; enum PULL { PULLOFF, PULLDOWN, PULLUP = 3 }; enum DRIVE { S0S1, H0S1, S0H1, H0H1, D0S1, D0H1, S0D1, H0D1 }; enum SENSE { SENSEOFF, SENSEHI = 2, SENSELO }; } using namespace GPIO; /*------------------------------------------------------------------------------ Gpio struct - template parameter of GPIO::PIN, and INVERT with a default of HIGHISON ------------------------------------------------------------------------------*/ template<PIN Pin_, INVERT Inv_ = HIGHISON> struct Gpio { //============ private: //============ SCA port_ { Pin_/32 }; //port 0 or 1 SCA base_ { 0x50000000+(0x300*port_) }; SCA pin_ { Pin_ bitand 31 }; //pin 0-31 SCA bm_ { 1<<pin_ }; //pin bitmask for multipin registers SCA inv_ { Inv_ == LOWISON };//invert? (low=on?) template<u8 PinN_> struct Gpio_; //forward declare register struct, they are at end //------------ // init //------------ /* for init() function or constructor, provide enum values in GPIO namespace to arguments in any order to set pin config will get default values if anything is not specified DETECT and LATCH are unchanged so will need to be set with other functions */ struct initT; //forward declare init struct, they are at end template<typename ...Ts> SCA init_ (initT& it, MODE e, Ts... ts) { it.DIRP = (e == OUTPUT); //let output use in buffer so if use the is* functions //intended for input, they will still work for output it.INBUF = (e == ANALOG); //inbif off only for analog init_(it, ts...); } template<typename ...Ts> SCA init_ (initT& it, PULL e, Ts... ts) { it.PULL = e; init_(it, ts...); } template<typename ...Ts> SCA init_ (initT& it, DRIVE e, Ts... ts) { it.DRIVE = e; init_(it, ts...); } template<typename ...Ts> SCA init_ (initT& it, SENSE e, Ts... ts) { it.SENSE = e; init_(it, ts...); } SCA init_ (initT& it) { //no more arguments, now set PIN_CNF from accumulated values if( it.DIRP ) off(); //if output, set to off reg.PIN_CNF = it.INIT_CNF; } //============ public: //============ //give public access to registers static inline volatile Gpio_<pin_>& reg { *(reinterpret_cast<Gpio_<pin_>*>(base_)) }; Gpio () {} //init later template<typename ...Ts> Gpio (Ts... ts) { init( ts... ); } //init now //------------ // init //------------ template<typename ...Ts> SA init (Ts... ts) { initT it{2}; init_(it, ts...); } //------------ // output //------------ SA high () { reg.OUTSET = bm_; } //register wide write SA low () { reg.OUTCLR = bm_; } //register wide write SA off () { if ( inv_ ) high(); else low(); } SA on () { if ( inv_ ) low(); else high(); } SA on (bool tf) { if( tf ) on(); else off(); } SA toggle () { if( reg.OUT ) low(); else high(); } //------------ // input //------------ SA isHigh () { return reg.IN; } SA isLow () { return not isHigh(); } SA isOn () { return inv_ ? isLow() : isHigh(); } SA isOff () { return not isOn(); } //------------ // properties //------------ SA pull (PULL e) { reg.PULL = e; } SA drive (DRIVE e) { reg.DRIVE = e; } SA sense (SENSE e) { reg.SENSE = e; } SA inputOff () { reg.INBUF = 1; } SA inputOn () { reg.INBUF = 0; } SA latchOff () { reg.DETECTMODE = 0; } SA latchOn () { reg.DETECTMODE = 1; } //------------ // status //------------ SA isOutput () { return reg.DIRP; } SA isInbuf () { return reg.INBUF == 0; } //1=off, 0=on SA isInput () { return not isOutput() and isInbuf(); } SA isOutputOnly() { return isOutput() and not isInbuf(); } SA isAnalog () { return not isOutput() and not isInbuf(); } SA isLatch () { return reg.lATCH; } SA clearLatch () { reg.LATCH = 1; } //------------ // misc //------------ //so can get pin number from an existing instance //(if user only has the instance name, but needs the pin number) //the GPIO::PIN numbers in use match the pin number scheme used //in places that sets a peripheral pin // PSEL.SCA = board.sca.pinNumber(); SCA pinNumber () { return Pin_; } SA blinkN (uint16_t n, uint32_t mson, uint32_t msoff = 0, uint32_t lastdelayms = 0) { if( not isOutput() ) return; if( msoff == 0 ) msoff = mson; while( n-- ){ toggle(); delayMS( mson ); toggle(); delayMS( msoff ); } if( lastdelayms ) delayMS( lastdelayms ); //will be in same state as when we arrived } //============ private: //============ //------------ // registers //------------ #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Wpedantic" template<u8 PinN_> struct Gpio_ { u32 unused1[0x504/4]; union { u32 OUT32; //0x50420 struct { u32 : PinN_; u32 OUT : 1; u32 : 31-PinN_; };}; u32 OUTSET; //0x508 u32 OUTCLR; //0x50C union { u32 IN32; //0x510 struct { u32 : PinN_; u32 IN : 1; u32 : 31-PinN_; };}; union { u32 DIR32; //0x514 struct { u32 : PinN_; u32 DIR : 1; u32 : 31-PinN_; };}; u32 DIRSET; //0x518 u32 DIRCLR; //0x51C union { u32 LATCH32; //0x520 struct { u32 : PinN_; u32 LATCH : 1; u32 : 31-PinN_; };}; union { u32 DETECTMODE32; //0x524 struct { u32 : PinN_; u32 DETECTMODE : 1; u32 : 31-PinN_; };}; u32 unused2[(0x700-0x528)/4 + PinN_]; //0x700+Pin_*4 union { u32 PIN_CNF; struct { u32 DIRP : 1; u32 INBUF : 1; //1 = disable (default) u32 PULL : 2; u32 unused3 : 4; u32 DRIVE : 3; u32 unused4 : 5; u32 SENSE : 2; };}; }; #pragma GCC diagnostic pop /* for init() function or constructor, provide enum values in GPIO namespace to arguments in any order to set pin config will get default values if anything is not specified DETECT and LATCH are unchanged so will need to be set with other functions */ #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Wpedantic" struct initT { union { u32 INIT_CNF; struct { u32 DIRP : 1; u32 INBUF : 1; //1 = disable (default) u32 PULL : 2; u32 unused3 : 4; u32 DRIVE : 3; u32 unused4 : 5; u32 SENSE : 2; };}; }; #pragma GCC diagnostic pop }; /*----------------------------------------------------------------------------*/ //resusing delayMS from startup.cpp here, since this is a single file Gpio<P0_7> ledRed{ OUTPUT, S0S1 }; //board label 1 Gpio<P0_8> ledGreen{ OUTPUT, S0S1 }; //board label 2 Gpio<P0_27, LOWISON> sw1{ INPUT, PULLUP }; //SW1 int main(void){ //start in opposite states, so can just toggle both to get alternating blink ledRed.on(); ledGreen.off(); while(1){ while( sw1.isOn() ){} //pause if sw pressed ledRed.toggle(); ledGreen.toggle(); delayMS(500); } } //the above single file is a combined startup/main- test.cpp //the linker script is in a separate file- linker_script.ld //run these commands to build the elf file #if 0 ./arm-none-eabi-c++ -Os -mcpu=cortex-m4 --std=c++17 -fno-exceptions -fdata-sections -ffunction-sections -Wl,--gc-sections --specs=nano.specs -Tlinker_script.ld test.cpp ./arm-none-eabi-objcopy -O ihex a.out a.hex #endif //and program the hex file into a nRF52810 via nRF52 dev board #if 0 nrfjprog -f nrf52 --program a.hex --sectorerase nrfjprog -f nrf52 --reset #endif
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