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llvm source #1
Output
Compile to binary object
Link to binary
Execute the code
Intel asm syntax
Demangle identifiers
Verbose demangling
Filters
Unused labels
Library functions
Directives
Comments
Horizontal whitespace
Debug intrinsics
Compiler
clang (assertions trunk)
clang (trunk)
clang 10.0.0
clang 10.0.1
clang 11.0.0
clang 11.0.1
clang 12.0.0
clang 12.0.1
clang 13.0.0
clang 14.0.0
clang 15.0.0
clang 16.0.0
clang 17.0.1
clang 18.1.0
clang 19.1.0
clang 4.0.1
clang 5.0.0
clang 6.0.0
clang 7.0.0
clang 8.0.0
clang 9.0.0
llc (assertions trunk)
llc (trunk)
llc 10.0.0
llc 10.0.1
llc 11.0.0
llc 11.0.1
llc 12.0.0
llc 12.0.1
llc 13.0.0
llc 14.0.0
llc 15.0.0
llc 16.0.0
llc 17.0.1
llc 18.1.0
llc 19.1.0
llc 3.2
llc 3.3
llc 3.9.1
llc 4.0.0
llc 4.0.1
llc 5.0.0
llc 6.0.0
llc 7.0.0
llc 8.0.0
llc 9.0.0
opt (assertions trunk)
opt (trunk)
opt 10.0.0
opt 10.0.1
opt 11.0.0
opt 11.0.1
opt 12.0.0
opt 12.0.1
opt 13.0.0
opt 14.0.0
opt 15.0.0
opt 16.0.0
opt 17.0.1
opt 18.1.0
opt 19.1.0
opt 3.2
opt 3.3
opt 3.9.1
opt 4.0.0
opt 4.0.1
opt 5.0.0
opt 6.0.0
opt 7.0.0
opt 8.0.0
opt 9.0.0
Options
Source code
define void @vf32(<32 x i16>* %in.vecptr0, <32 x i16>* %in.vecptr1, <32 x i16>* %in.vecptr2, <32 x i16>* %in.vecptr3, <128 x i16>* %out.vec) nounwind { %in.vec0 = load <32 x i16>, <32 x i16>* %in.vecptr0, align 32 %in.vec1 = load <32 x i16>, <32 x i16>* %in.vecptr1, align 32 %in.vec2 = load <32 x i16>, <32 x i16>* %in.vecptr2, align 32 %in.vec3 = load <32 x i16>, <32 x i16>* %in.vecptr3, align 32 tail call void asm sideeffect "# LLVM-MCA-BEGIN", "~{dirflag},~{fpsr},~{flags}"() %concat01 = shufflevector <32 x i16> %in.vec0, <32 x i16> %in.vec1, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63> %concat23 = shufflevector <32 x i16> %in.vec2, <32 x i16> %in.vec3, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63> %concat0123 = shufflevector <64 x i16> %concat01, <64 x i16> %concat23, <128 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127> %interleaved.vec = shufflevector <128 x i16> %concat0123, <128 x i16> poison, <128 x i32> <i32 0, i32 32, i32 64, i32 96, i32 1, i32 33, i32 65, i32 97, i32 2, i32 34, i32 66, i32 98, i32 3, i32 35, i32 67, i32 99, i32 4, i32 36, i32 68, i32 100, i32 5, i32 37, i32 69, i32 101, i32 6, i32 38, i32 70, i32 102, i32 7, i32 39, i32 71, i32 103, i32 8, i32 40, i32 72, i32 104, i32 9, i32 41, i32 73, i32 105, i32 10, i32 42, i32 74, i32 106, i32 11, i32 43, i32 75, i32 107, i32 12, i32 44, i32 76, i32 108, i32 13, i32 45, i32 77, i32 109, i32 14, i32 46, i32 78, i32 110, i32 15, i32 47, i32 79, i32 111, i32 16, i32 48, i32 80, i32 112, i32 17, i32 49, i32 81, i32 113, i32 18, i32 50, i32 82, i32 114, i32 19, i32 51, i32 83, i32 115, i32 20, i32 52, i32 84, i32 116, i32 21, i32 53, i32 85, i32 117, i32 22, i32 54, i32 86, i32 118, i32 23, i32 55, i32 87, i32 119, i32 24, i32 56, i32 88, i32 120, i32 25, i32 57, i32 89, i32 121, i32 26, i32 58, i32 90, i32 122, i32 27, i32 59, i32 91, i32 123, i32 28, i32 60, i32 92, i32 124, i32 29, i32 61, i32 93, i32 125, i32 30, i32 62, i32 94, i32 126, i32 31, i32 63, i32 95, i32 127> tail call void asm sideeffect "# LLVM-MCA-END", "~{dirflag},~{fpsr},~{flags}"() store <128 x i16> %interleaved.vec, <128 x i16>* %out.vec, align 32 ret void }
analysis source #2
Output
Compile to binary object
Link to binary
Execute the code
Intel asm syntax
Demangle identifiers
Verbose demangling
Filters
Unused labels
Library functions
Directives
Comments
Horizontal whitespace
Debug intrinsics
Compiler
OSACA (0.6.1)
llvm-mca (assertions trunk)
llvm-mca (trunk)
Options
Source code
vpunpcklwd xmm3, xmm1, xmm0 # xmm3 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] vpshufd xmm8, xmm3, 80 # xmm8 = xmm3[0,0,1,1] vpshufd xmm3, xmm3, 250 # xmm3 = xmm3[2,2,3,3] vinserti128 ymm3, ymm8, xmm3, 1 vpunpcklwd xmm5, xmm6, xmm4 # xmm5 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3] vpmovzxdq xmm8, xmm5 # xmm8 = xmm5[0],zero,xmm5[1],zero vpshufd xmm5, xmm5, 250 # xmm5 = xmm5[2,2,3,3] vinserti128 ymm5, ymm8, xmm5, 1 vpblendd ymm8, ymm5, ymm3, 170 # ymm8 = ymm5[0],ymm3[1],ymm5[2],ymm3[3],ymm5[4],ymm3[5],ymm5[6],ymm3[7] vpunpckhwd xmm0, xmm1, xmm0 # xmm0 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] vpshufd xmm1, xmm0, 80 # xmm1 = xmm0[0,0,1,1] vpshufd xmm0, xmm0, 250 # xmm0 = xmm0[2,2,3,3] vinserti128 ymm0, ymm1, xmm0, 1 vpunpckhwd xmm1, xmm6, xmm4 # xmm1 = xmm6[4],xmm4[4],xmm6[5],xmm4[5],xmm6[6],xmm4[6],xmm6[7],xmm4[7] vpmovzxdq xmm4, xmm1 # xmm4 = xmm1[0],zero,xmm1[1],zero vpshufd xmm1, xmm1, 250 # xmm1 = xmm1[2,2,3,3] vinserti128 ymm1, ymm4, xmm1, 1 vpblendd ymm14, ymm1, ymm0, 170 # ymm14 = ymm1[0],ymm0[1],ymm1[2],ymm0[3],ymm1[4],ymm0[5],ymm1[6],ymm0[7] vpunpcklwd xmm0, xmm3, xmm7 # xmm0 = xmm3[0],xmm7[0],xmm3[1],xmm7[1],xmm3[2],xmm7[2],xmm3[3],xmm7[3] vpshufd xmm1, xmm0, 80 # xmm1 = xmm0[0,0,1,1] vpshufd xmm0, xmm0, 250 # xmm0 = xmm0[2,2,3,3] vinserti128 ymm0, ymm1, xmm0, 1 vpunpcklwd xmm1, xmm2, xmm13 # xmm1 = xmm2[0],xmm13[0],xmm2[1],xmm13[1],xmm2[2],xmm13[2],xmm2[3],xmm13[3] vpmovzxdq xmm5, xmm1 # xmm5 = xmm1[0],zero,xmm1[1],zero vpshufd xmm1, xmm1, 250 # xmm1 = xmm1[2,2,3,3] vinserti128 ymm1, ymm5, xmm1, 1 vpblendd ymm6, ymm1, ymm0, 170 # ymm6 = ymm1[0],ymm0[1],ymm1[2],ymm0[3],ymm1[4],ymm0[5],ymm1[6],ymm0[7] vpunpckhwd xmm1, xmm3, xmm7 # xmm1 = xmm3[4],xmm7[4],xmm3[5],xmm7[5],xmm3[6],xmm7[6],xmm3[7],xmm7[7] vpshufd xmm3, xmm1, 80 # xmm3 = xmm1[0,0,1,1] vpshufd xmm1, xmm1, 250 # xmm1 = xmm1[2,2,3,3] vinserti128 ymm1, ymm3, xmm1, 1 vpunpckhwd xmm2, xmm2, xmm13 # xmm2 = xmm2[4],xmm13[4],xmm2[5],xmm13[5],xmm2[6],xmm13[6],xmm2[7],xmm13[7] vpmovzxdq xmm3, xmm2 # xmm3 = xmm2[0],zero,xmm2[1],zero vpshufd xmm2, xmm2, 250 # xmm2 = xmm2[2,2,3,3] vinserti128 ymm2, ymm3, xmm2, 1 vpblendd ymm2, ymm2, ymm1, 170 # ymm2 = ymm2[0],ymm1[1],ymm2[2],ymm1[3],ymm2[4],ymm1[5],ymm2[6],ymm1[7] vpunpcklwd xmm1, xmm0, xmm5 # xmm1 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3] vpshufd xmm3, xmm1, 80 # xmm3 = xmm1[0,0,1,1] vpshufd xmm1, xmm1, 250 # xmm1 = xmm1[2,2,3,3] vinserti128 ymm1, ymm3, xmm1, 1 vpunpcklwd xmm3, xmm12, xmm11 # xmm3 = xmm12[0],xmm11[0],xmm12[1],xmm11[1],xmm12[2],xmm11[2],xmm12[3],xmm11[3] vpmovzxdq xmm7, xmm3 # xmm7 = xmm3[0],zero,xmm3[1],zero vpshufd xmm3, xmm3, 250 # xmm3 = xmm3[2,2,3,3] vinserti128 ymm3, ymm7, xmm3, 1 vpblendd ymm7, ymm3, ymm1, 170 # ymm7 = ymm3[0],ymm1[1],ymm3[2],ymm1[3],ymm3[4],ymm1[5],ymm3[6],ymm1[7] vpunpckhwd xmm0, xmm0, xmm5 # xmm0 = xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7] vpshufd xmm3, xmm0, 80 # xmm3 = xmm0[0,0,1,1] vpshufd xmm0, xmm0, 250 # xmm0 = xmm0[2,2,3,3] vinserti128 ymm0, ymm3, xmm0, 1 vpunpckhwd xmm3, xmm12, xmm11 # xmm3 = xmm12[4],xmm11[4],xmm12[5],xmm11[5],xmm12[6],xmm11[6],xmm12[7],xmm11[7] vpmovzxdq xmm5, xmm3 # xmm5 = xmm3[0],zero,xmm3[1],zero vpshufd xmm3, xmm3, 250 # xmm3 = xmm3[2,2,3,3] vinserti128 ymm3, ymm5, xmm3, 1 vpblendd ymm0, ymm3, ymm0, 170 # ymm0 = ymm3[0],ymm0[1],ymm3[2],ymm0[3],ymm3[4],ymm0[5],ymm3[6],ymm0[7] vpunpcklwd xmm3, xmm1, xmm4 # xmm3 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3] vpshufd xmm5, xmm3, 80 # xmm5 = xmm3[0,0,1,1] vpshufd xmm3, xmm3, 250 # xmm3 = xmm3[2,2,3,3] vinserti128 ymm3, ymm5, xmm3, 1 vpunpcklwd xmm5, xmm10, xmm9 # xmm5 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3] vpmovzxdq xmm11, xmm5 # xmm11 = xmm5[0],zero,xmm5[1],zero vpshufd xmm5, xmm5, 250 # xmm5 = xmm5[2,2,3,3] vinserti128 ymm5, ymm11, xmm5, 1 vpblendd ymm3, ymm5, ymm3, 170 # ymm3 = ymm5[0],ymm3[1],ymm5[2],ymm3[3],ymm5[4],ymm3[5],ymm5[6],ymm3[7] vpunpckhwd xmm1, xmm1, xmm4 # xmm1 = xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] vpshufd xmm4, xmm1, 80 # xmm4 = xmm1[0,0,1,1] vpshufd xmm1, xmm1, 250 # xmm1 = xmm1[2,2,3,3] vinserti128 ymm1, ymm4, xmm1, 1 vpunpckhwd xmm4, xmm10, xmm9 # xmm4 = xmm10[4],xmm9[4],xmm10[5],xmm9[5],xmm10[6],xmm9[6],xmm10[7],xmm9[7] vpmovzxdq xmm5, xmm4 # xmm5 = xmm4[0],zero,xmm4[1],zero vpshufd xmm4, xmm4, 250 # xmm4 = xmm4[2,2,3,3] vinserti128 ymm4, ymm5, xmm4, 1 vpblendd ymm1, ymm4, ymm1, 170 # ymm1 = ymm4[0],ymm1[1],ymm4[2],ymm1[3],ymm4[4],ymm1[5],ymm4[6],ymm1[7]
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