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llvm source #1
Output
Compile to binary object
Link to binary
Execute the code
Intel asm syntax
Demangle identifiers
Verbose demangling
Filters
Unused labels
Library functions
Directives
Comments
Horizontal whitespace
Debug intrinsics
Compiler
clang (assertions trunk)
clang (trunk)
clang 10.0.0
clang 10.0.1
clang 11.0.0
clang 11.0.1
clang 12.0.0
clang 12.0.1
clang 13.0.0
clang 14.0.0
clang 15.0.0
clang 16.0.0
clang 17.0.1
clang 18.1.0
clang 19.1.0
clang 4.0.1
clang 5.0.0
clang 6.0.0
clang 7.0.0
clang 8.0.0
clang 9.0.0
llc (assertions trunk)
llc (trunk)
llc 10.0.0
llc 10.0.1
llc 11.0.0
llc 11.0.1
llc 12.0.0
llc 12.0.1
llc 13.0.0
llc 14.0.0
llc 15.0.0
llc 16.0.0
llc 17.0.1
llc 18.1.0
llc 19.1.0
llc 3.2
llc 3.3
llc 3.9.1
llc 4.0.0
llc 4.0.1
llc 5.0.0
llc 6.0.0
llc 7.0.0
llc 8.0.0
llc 9.0.0
opt (assertions trunk)
opt (trunk)
opt 10.0.0
opt 10.0.1
opt 11.0.0
opt 11.0.1
opt 12.0.0
opt 12.0.1
opt 13.0.0
opt 14.0.0
opt 15.0.0
opt 16.0.0
opt 17.0.1
opt 18.1.0
opt 19.1.0
opt 3.2
opt 3.3
opt 3.9.1
opt 4.0.0
opt 4.0.1
opt 5.0.0
opt 6.0.0
opt 7.0.0
opt 8.0.0
opt 9.0.0
Options
Source code
define void @load_i8_stride4_vf8(<32 x i8>* %in.vec, <8 x i8>* %out.vec0, <8 x i8>* %out.vec1, <8 x i8>* %out.vec2, <8 x i8>* %out.vec3) nounwind { %wide.vec = load <32 x i8>, <32 x i8>* %in.vec, align 32 tail call void asm sideeffect "# LLVM-MCA-BEGIN", "~{dirflag},~{fpsr},~{flags}"() %strided.vec0 = shufflevector <32 x i8> %wide.vec, <32 x i8> poison, <8 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28> %strided.vec1 = shufflevector <32 x i8> %wide.vec, <32 x i8> poison, <8 x i32> <i32 1, i32 5, i32 9, i32 13, i32 17, i32 21, i32 25, i32 29> %strided.vec2 = shufflevector <32 x i8> %wide.vec, <32 x i8> poison, <8 x i32> <i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30> %strided.vec3 = shufflevector <32 x i8> %wide.vec, <32 x i8> poison, <8 x i32> <i32 3, i32 7, i32 11, i32 15, i32 19, i32 23, i32 27, i32 31> tail call void asm sideeffect "# LLVM-MCA-END", "~{dirflag},~{fpsr},~{flags}"() store <8 x i8> %strided.vec0, <8 x i8>* %out.vec0, align 32 store <8 x i8> %strided.vec1, <8 x i8>* %out.vec1, align 32 store <8 x i8> %strided.vec2, <8 x i8>* %out.vec2, align 32 store <8 x i8> %strided.vec3, <8 x i8>* %out.vec3, align 32 ret void }
analysis source #2
Output
Compile to binary object
Link to binary
Execute the code
Intel asm syntax
Demangle identifiers
Verbose demangling
Filters
Unused labels
Library functions
Directives
Comments
Horizontal whitespace
Debug intrinsics
Compiler
OSACA (0.6.1)
llvm-mca (assertions trunk)
llvm-mca (trunk)
Options
Source code
vmovdqa xmm2, xmmword ptr [rip + .LCPI0_0] # xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u> vpshufb xmm3, xmm1, xmm2 vpshufb xmm2, xmm0, xmm2 vpunpckldq xmm2, xmm2, xmm3 # xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] vmovdqa xmm3, xmmword ptr [rip + .LCPI0_1] # xmm3 = <1,5,9,13,u,u,u,u,u,u,u,u,u,u,u,u> vpshufb xmm4, xmm1, xmm3 vpshufb xmm3, xmm0, xmm3 vpunpckldq xmm3, xmm3, xmm4 # xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] vmovdqa xmm4, xmmword ptr [rip + .LCPI0_2] # xmm4 = <2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u> vpshufb xmm5, xmm1, xmm4 vpshufb xmm4, xmm0, xmm4 vpunpckldq xmm4, xmm4, xmm5 # xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1] vmovdqa xmm5, xmmword ptr [rip + .LCPI0_3] # xmm5 = <3,7,11,15,u,u,u,u,u,u,u,u,u,u,u,u> vpshufb xmm1, xmm1, xmm5 vpshufb xmm0, xmm0, xmm5 vpunpckldq xmm0, xmm0, xmm1 # xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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