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llvm source #1
Output
Compile to binary object
Link to binary
Execute the code
Intel asm syntax
Demangle identifiers
Verbose demangling
Filters
Unused labels
Library functions
Directives
Comments
Horizontal whitespace
Debug intrinsics
Compiler
clang (assertions trunk)
clang (trunk)
clang 10.0.0
clang 10.0.1
clang 11.0.0
clang 11.0.1
clang 12.0.0
clang 12.0.1
clang 13.0.0
clang 14.0.0
clang 15.0.0
clang 16.0.0
clang 17.0.1
clang 18.1.0
clang 19.1.0
clang 4.0.1
clang 5.0.0
clang 6.0.0
clang 7.0.0
clang 8.0.0
clang 9.0.0
llc (assertions trunk)
llc (trunk)
llc 10.0.0
llc 10.0.1
llc 11.0.0
llc 11.0.1
llc 12.0.0
llc 12.0.1
llc 13.0.0
llc 14.0.0
llc 15.0.0
llc 16.0.0
llc 17.0.1
llc 18.1.0
llc 19.1.0
llc 3.2
llc 3.3
llc 3.9.1
llc 4.0.0
llc 4.0.1
llc 5.0.0
llc 6.0.0
llc 7.0.0
llc 8.0.0
llc 9.0.0
opt (assertions trunk)
opt (trunk)
opt 10.0.0
opt 10.0.1
opt 11.0.0
opt 11.0.1
opt 12.0.0
opt 12.0.1
opt 13.0.0
opt 14.0.0
opt 15.0.0
opt 16.0.0
opt 17.0.1
opt 18.1.0
opt 19.1.0
opt 3.2
opt 3.3
opt 3.9.1
opt 4.0.0
opt 4.0.1
opt 5.0.0
opt 6.0.0
opt 7.0.0
opt 8.0.0
opt 9.0.0
Options
Source code
define void @vf32(<64 x i16>* %in.vec, <32 x i16>* %out.vec0, <32 x i16>* %out.vec1) nounwind { %wide.vec = load <64 x i16>, <64 x i16>* %in.vec, align 32 tail call void asm sideeffect "# LLVM-MCA-BEGIN", "~{dirflag},~{fpsr},~{flags}"() %strided.vec0 = shufflevector <64 x i16> %wide.vec, <64 x i16> poison, <32 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62> %strided.vec1 = shufflevector <64 x i16> %wide.vec, <64 x i16> poison, <32 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63> tail call void asm sideeffect "# LLVM-MCA-END", "~{dirflag},~{fpsr},~{flags}"() store <32 x i16> %strided.vec0, <32 x i16>* %out.vec0, align 32 store <32 x i16> %strided.vec1, <32 x i16>* %out.vec1, align 32 ret void }
analysis source #2
Output
Compile to binary object
Link to binary
Execute the code
Intel asm syntax
Demangle identifiers
Verbose demangling
Filters
Unused labels
Library functions
Directives
Comments
Horizontal whitespace
Debug intrinsics
Compiler
OSACA (0.6.1)
llvm-mca (assertions trunk)
llvm-mca (trunk)
Options
Source code
vpshuflw ymm4, ymm1, 232 # ymm4 = ymm1[0,2,2,3,4,5,6,7,8,10,10,11,12,13,14,15] vpshufhw ymm4, ymm4, 232 # ymm4 = ymm4[0,1,2,3,4,6,6,7,8,9,10,11,12,14,14,15] vpshuflw ymm5, ymm0, 232 # ymm5 = ymm0[0,2,2,3,4,5,6,7,8,10,10,11,12,13,14,15] vpshufhw ymm5, ymm5, 232 # ymm5 = ymm5[0,1,2,3,4,6,6,7,8,9,10,11,12,14,14,15] vshufps ymm4, ymm5, ymm4, 136 # ymm4 = ymm5[0,2],ymm4[0,2],ymm5[4,6],ymm4[4,6] vpermpd ymm4, ymm4, 216 # ymm4 = ymm4[0,2,1,3] vpshuflw ymm5, ymm3, 232 # ymm5 = ymm3[0,2,2,3,4,5,6,7,8,10,10,11,12,13,14,15] vpshufhw ymm5, ymm5, 232 # ymm5 = ymm5[0,1,2,3,4,6,6,7,8,9,10,11,12,14,14,15] vpshuflw ymm6, ymm2, 232 # ymm6 = ymm2[0,2,2,3,4,5,6,7,8,10,10,11,12,13,14,15] vpshufhw ymm6, ymm6, 232 # ymm6 = ymm6[0,1,2,3,4,6,6,7,8,9,10,11,12,14,14,15] vshufps ymm5, ymm6, ymm5, 136 # ymm5 = ymm6[0,2],ymm5[0,2],ymm6[4,6],ymm5[4,6] vpermpd ymm5, ymm5, 216 # ymm5 = ymm5[0,2,1,3] vmovdqa ymm6, ymmword ptr [rip + .LCPI0_0] # ymm6 = <u,u,u,u,u,u,u,u,2,3,6,7,10,11,14,15,u,u,u,u,u,u,u,u,18,19,22,23,26,27,30,31> vpshufb ymm1, ymm1, ymm6 vmovdqa ymm7, ymmword ptr [rip + .LCPI0_1] # ymm7 = <2,3,6,7,10,11,14,15,u,u,u,u,u,u,u,u,18,19,22,23,26,27,30,31,u,u,u,u,u,u,u,u> vpshufb ymm0, ymm0, ymm7 vpblendd ymm0, ymm0, ymm1, 204 # ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7] vpermq ymm0, ymm0, 216 # ymm0 = ymm0[0,2,1,3] vpshufb ymm1, ymm3, ymm6 vpshufb ymm2, ymm2, ymm7 vpblendd ymm1, ymm2, ymm1, 204 # ymm1 = ymm2[0,1],ymm1[2,3],ymm2[4,5],ymm1[6,7] vpermq ymm1, ymm1, 216 # ymm1 = ymm1[0,2,1,3]
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