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// SPDX-License-Identifier: ISC
//
// Copyright 2022 Michael Rodriguez
//
// Permission to use, copy, modify, and/or distribute this software for any
// purpose with or without fee is hereby granted, provided that the above
// copyright notice and this permission notice appear in all copies.
//
// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
// REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
// AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
// INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
// LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
// OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
// PERFORMANCE OF THIS SOFTWARE.

// heat i love you

#include <fmt/core.h>

#include <filesystem>
#include <fstream>

#include "gbcore/cpu.h"
#include "gbcore/scheduler.h"
#include "gbcore/timer.h"
#include "gtest/gtest.h"

namespace {
// Convenience function to improve readability in data structures.
[[nodiscard]] constexpr auto operator""_KB(
    const unsigned long long value) noexcept -> std::size_t {
  return 1024U * value;
}

class GBCoreCPUTestRunner : public ::testing::Test {
 protected:
  GBCoreCPUTestRunner() noexcept : timer_(sched_) {}

void DoTest(std::string_view test_rom, std::string_view test_log) noexcept {
    LoadTestROM(test_rom);
    LoadTestLog(test_log);
    ExecuteTest();
  }

private:
  [[nodiscard]] auto HandleMemoryRead(
      const gameboy::Word address) const noexcept -> gameboy::Byte {
    switch (address) {
      case 0x0000 ... 0x7FFF:
        return rom_data_[address];

case 0xC000 ... 0xDFFF:
        return wram_[address - 0xC000];

case 0xFF0F:  // IF
        return interrupt_flag_;

case 0xFF44:  // LY
        // This is required to be stubbed to 0x90.
        return 0x90;

case 0xFF80 ... 0xFFFE:
        return hram_[address - 0xFF80];

case 0xFFFF:  // IE
        return 0xFF;

default:
        std::cerr << fmt::format("Unhandled memory read: ${:04X}", address);
        abort();
    }
  }

void HandleMemoryWrite(const gameboy::Word address,
                         const gameboy::Byte data) noexcept {
    switch (address) {
      // Stubbed because we don't care about VRAM.
      case 0x8000 ... 0x9FFF:
        return;

case 0xC000 ... 0xDFFF:
        wram_[address - 0xC000] = data;
        return;

case 0xFF01:  // SB
        // XXX: We have to output to std::cerr because googletest doesn't
        // allow us to print to stdout.
        std::cerr << static_cast<char>(data);
        return;

// Stubbed because we don't care about this register.
      case 0xFF02:  // SC
        return;

case 0xFF05:  // TIMA
        timer_.SetTIMA(data);
        return;

case 0xFF06:  // TMA
        timer_.tma_ = data;
        return;

case 0xFF07:  // TAC
        timer_.SetTAC(data);
        return;

case 0xFF0F:  // IF
        interrupt_flag_ = data;
        return;

// Stubbed because we don't care about these registers.
      case 0xFF24:  // NR50
      case 0xFF25:  // NR51
      case 0xFF26:  // NR52
      case 0xFF40:  // LCDC
      case 0xFF42:  // SCY
      case 0xFF43:  // SCX
      case 0xFF47:  // BGP
        return;

case 0xFF80 ... 0xFFFE:
        hram_[address - 0xFF80] = data;
        return;

case 0xFFFF:  // IE
        return;

default:
        std::cerr << fmt::format("Unhandled memory write: ${:04X} <- ${:02X}",
                                 address, data);
        abort();
    }
  }

auto GetDisassembly(std::string& str) const noexcept -> void {
    // Format: [registers] (mem[pc] mem[pc+1] mem[pc+2] mem[pc+3])
    // A: 01 F: B0 B: 00 C: 13 D: 00 E: D8 H: 01 L: 4D SP: FFFE PC: 00:0100 (00
    // C3 13 02)

const auto mem_0 = HandleMemoryRead(cpu_.reg.pc + 0);
    const auto mem_1 = HandleMemoryRead(cpu_.reg.pc + 1);
    const auto mem_2 = HandleMemoryRead(cpu_.reg.pc + 2);
    const auto mem_3 = HandleMemoryRead(cpu_.reg.pc + 3);

fmt::format_to(str.begin(),
                   "A: {:02X} F: {:02X} B: {:02X} C: {:02X} D: "
                   "{:02X} E: {:02X} H: {:02X} L: {:02X} SP: {:04X} PC: "
                   "00:{:04X} ({:02X} {:02X} {:02X} {:02X})",
                   cpu_.reg.af.hi, cpu_.reg.af.lo, cpu_.reg.bc.hi,
                   cpu_.reg.bc.lo, cpu_.reg.de.hi, cpu_.reg.de.lo,
                   cpu_.reg.hl.hi, cpu_.reg.hl.lo, cpu_.reg.sp, cpu_.reg.pc,
                   mem_0, mem_1, mem_2, mem_3);
  }

void LoadTestROM(std::string_view test_rom_file_path) noexcept {
    const auto resolved_path =
        std::filesystem::current_path() / "test_roms" / test_rom_file_path;

auto file_handle = std::ifstream{resolved_path, std::ios::binary};

EXPECT_TRUE(file_handle) << "Could not open ROM file.";

file_handle.read(reinterpret_cast<char*>(rom_data_.data()),
                     rom_data_.size());
  }

void LoadTestLog(std::string_view test_log_path) noexcept {
    const auto resolved_path =
        std::filesystem::current_path() / "test_logs" / test_log_path;
    auto file_handle = std::ifstream{resolved_path};

EXPECT_TRUE(file_handle) << "Could not open log file.";

auto line = std::string{};

while (std::getline(file_handle, line)) {
      log_lines_.emplace_back(line);
    }
  }

void ExecuteTest() noexcept {
    // Begin the test in a known good state.
    cpu_.Reset();

// The current step we are executing.
    auto current_step = 0;

// How many steps do we need to take before considering the test concluded?
    const auto max_num_steps = log_lines_.size();

auto disasm = std::string{};
    disasm.resize(82);

while (current_step != max_num_steps) {
      // The hardware logs we're using log the state of the CPU before every
      // instruction.
      GetDisassembly(disasm);

if (timer_.InterruptRequested()) {
        interrupt_flag_ |= (1 << 2);
      }

// We want to stop the test immediately if anything is out of place.
      // ASSERT_EQ(disasm, log_lines_[cycle_count])
      //   << fmt::format("Refer to log line {}", cycle_count + 1);
      const auto num_t_cycles_passed = cpu_.Step();

if (num_t_cycles_passed ==
          gameboy::CPU::SpecialConditions::kIllegalInstructionTrapped) {
        auto instruction_formatted = std::string{};

if (cpu_.instruction == 0xCB) {
          const auto actual_instruction = HandleMemoryRead(cpu_.reg.pc - 1);
          instruction_formatted = fmt::format("CB:${:02X}", actual_instruction);
        } else {
          instruction_formatted = fmt::format("${:02X}", cpu_.instruction);
        }

ASSERT_FALSE(true) << fmt::format(
            "Illegal instruction {} trapped at program counter ${:04X}.",
            instruction_formatted, cpu_.reg.pc - 1);
      }

if ((num_t_cycles_passed % 4) != 0) {
        abort();
      }
      sched_.AddCycles(num_t_cycles_passed);
      current_step++;
    }
  }

// The log lines from the expected output log.
  std::vector<std::string> log_lines_;

// The ROM data we are using to execute the test. We know for a fact that each
  // ROM is exactly 32KB.
  std::array<gameboy::Byte, 32_KB> rom_data_;

std::array<gameboy::Byte, 8192> wram_;

std::array<gameboy::Byte, 127> hram_;

// The Sharp SM83 CPU instance.
  gameboy::CPU<decltype(HandleMemoryRead), decltype(HandleMemoryWrite)> cpu_;

gameboy::Scheduler sched_;
  gameboy::Timer timer_;

gameboy::Byte interrupt_flag_;
};

TEST_F(GBCoreCPUTestRunner, Blargg_01_special) {
  DoTest("01-special.gb", "01-special.txt");
}

TEST_F(GBCoreCPUTestRunner, Blargg_03_op_sp_hl) {
  DoTest("03-op sp,hl.gb", "03-op sp,hl.txt");
}

TEST_F(GBCoreCPUTestRunner, Blargg_04_op_r_imm) {
  DoTest("04-op r,imm.gb", "04-op r,imm.txt");
}

TEST_F(GBCoreCPUTestRunner, Blargg_05_op_rp) {
  DoTest("05-op rp.gb", "05-op rp.txt");
}

TEST_F(GBCoreCPUTestRunner, Blargg_06_ld_r_r) {
  DoTest("06-ld r,r.gb", "06-ld r,r.txt");
}

TEST_F(GBCoreCPUTestRunner, Blargg_07_jr_jp_call_ret_rst) {
  DoTest("07-jr,jp,call,ret,rst.gb", "07-jr,jp,call,ret,rst.txt");
}

TEST_F(GBCoreCPUTestRunner, Blargg_08_misc_instrs) {
  DoTest("08-misc instrs.gb", "08-misc instrs.txt");
}

TEST_F(GBCoreCPUTestRunner, Blargg_09_op_r_r) {
  DoTest("09-op r,r.gb", "09-op r,r.txt");
}

TEST_F(GBCoreCPUTestRunner, Blargg_10_bit_ops) {
  DoTest("10-bit ops.gb", "10-bit ops.txt");
}

TEST_F(GBCoreCPUTestRunner, Blargg_11_op_a_hl) {
  DoTest("11-op a,(hl).gb", "11-op a,(hl).txt");
}

TEST_F(GBCoreCPUTestRunner, Blargg_instr_timing) {
  DoTest("instr_timing.gb", "10-bit ops.txt");
}
}  // namespace