Compiler Explorer

Source code

--- |
  ; ModuleID = 'test.mir'
  source_filename = "reduced.ll"
  target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
  target triple = "x86_64-pc-windows-msvc"
  
  define void @verify_remat(ptr %arg, ptr %arg1, ptr %arg2, ptr %arg3, ptr %arg4, float %arg5, float %arg6, i1 %arg7, <4 x float> %arg8, <4 x float> %arg9, <4 x float> %arg10, <4 x float> %arg11, <4 x i1> %arg12, <4 x i1> %arg13, <4 x float> %arg14, <4 x float> %arg15, <4 x i1> %arg16) #0 {
  bb:
    unreachable
  
  bb17:                                             ; preds = %bb85, %bb22, %bb
    unreachable
  
  bb18:                                             ; preds = %bb20, %bb17
    unreachable
  
  bb19:                                             ; preds = %bb21, %bb18
    unreachable
  
  bb20:                                             ; preds = %bb19
    unreachable
  
  bb21:                                             ; preds = %bb19
    unreachable
  
  bb22:                                             ; preds = %bb20
    unreachable
  
  bb23:                                             ; preds = %bb22
    unreachable
  
  bb24:                                             ; preds = %bb24
    unreachable
  
  bb25:                                             ; preds = %bb25, %bb23
    unreachable
  
  bb28:                                             ; preds = %bb25
    unreachable
  
  bb29:                                             ; preds = %bb70, %bb28
    unreachable
  
  bb47:                                             ; preds = %bb29
    unreachable
  
  bb58:                                             ; preds = %bb47, %bb29
    unreachable
  
  bb63:                                             ; preds = %bb58
    unreachable
  
  bb70:                                             ; preds = %bb63, %bb58
    unreachable
  
  bb85:                                             ; preds = %bb70
    unreachable
  }
  
  attributes #0 = { "target-cpu"="skylake-avx512" }
...
---
name:            verify_remat
alignment:       16
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
hasWinCFI:       false
noPhis:          true
isSSA:           false
noVRegs:         false
hasFakeUses:     false
callsEHReturn:   false
callsUnwindInit: false
hasEHContTarget: false
hasEHScopes:     false
hasEHFunclets:   false
isOutlined:      false
debugInstrRef:   true
failsVerification: false
tracksDebugUserValues: false
registers:
  - { id: 0, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 1, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 2, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 3, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 4, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 5, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 6, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 7, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 8, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 9, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 10, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 11, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 12, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 13, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 14, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 15, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 16, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 17, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 18, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 19, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 20, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 21, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 22, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 23, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 24, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 25, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 26, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 27, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 28, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 29, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 30, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 31, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 32, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 33, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 34, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 35, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 36, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 37, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 38, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 39, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 40, class: fr32x, preferred-register: '', flags: [  ] }
  - { id: 41, class: fr32x, preferred-register: '', flags: [  ] }
  - { id: 42, class: gr8, preferred-register: '', flags: [  ] }
  - { id: 43, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 44, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 45, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 46, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 47, class: vk16wm, preferred-register: '', flags: [  ] }
  - { id: 48, class: vk16wm, preferred-register: '', flags: [  ] }
  - { id: 49, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 50, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 51, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 52, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 53, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 54, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 55, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 56, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 57, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 58, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 59, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 60, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 61, class: gr64_with_sub_8bit, preferred-register: '', flags: [  ] }
  - { id: 62, class: gr32, preferred-register: '', flags: [  ] }
  - { id: 63, class: gr64, preferred-register: '', flags: [  ] }
  - { id: 64, class: gr32, preferred-register: '', flags: [  ] }
  - { id: 65, class: gr64_with_sub_8bit, preferred-register: '', flags: [  ] }
  - { id: 66, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 67, class: vr256, preferred-register: '', flags: [  ] }
  - { id: 68, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 69, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 70, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 71, class: gr8, preferred-register: '', flags: [  ] }
  - { id: 72, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 73, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 74, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 75, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 76, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 77, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 78, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 79, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 80, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 81, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 82, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 83, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 84, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 85, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 86, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 87, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 88, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 89, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 90, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 91, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 92, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 93, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 94, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 95, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 96, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 97, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 98, class: gr8, preferred-register: '', flags: [  ] }
  - { id: 99, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 100, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 101, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 102, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 103, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 104, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 105, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 106, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 107, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 108, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 109, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 110, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 111, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 112, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 113, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 114, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 115, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 116, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 117, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 118, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 119, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 120, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 121, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 122, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 123, class: gr64_with_sub_8bit, preferred-register: '', flags: [  ] }
  - { id: 124, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 125, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 126, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 127, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 128, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 129, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 130, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 131, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 132, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 133, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 134, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 135, class: vr256x, preferred-register: '', flags: [  ] }
  - { id: 136, class: vr128x, preferred-register: '', flags: [  ] }
  - { id: 137, class: vr128x, preferred-register: '', flags: [  ] }
liveins:
  - { reg: '$rcx', virtual-reg: '%35' }
  - { reg: '$rdx', virtual-reg: '%36' }
  - { reg: '$r8', virtual-reg: '%37' }
  - { reg: '$r9', virtual-reg: '%38' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    16
  adjustsStack:    true
  hasCalls:        true
  stackProtector:  ''
  functionContext: ''
  maxCallFrameSize: 4294967295
  cvBytesOfCalleeSavedRegisters: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  hasTailCall:     false
  isCalleeSavedInfoValid: false
  localFrameSize:  0
fixedStack:
  - { id: 0, type: default, offset: 32, size: 8, alignment: 16, stack-id: default, 
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 1, type: default, offset: 40, size: 4, alignment: 8, stack-id: default, 
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 2, type: default, offset: 48, size: 4, alignment: 16, stack-id: default, 
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 3, type: default, offset: 56, size: 1, alignment: 8, stack-id: default, 
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 4, type: default, offset: 64, size: 8, alignment: 16, stack-id: default, 
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 5, type: default, offset: 72, size: 8, alignment: 8, stack-id: default, 
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 6, type: default, offset: 80, size: 8, alignment: 16, stack-id: default, 
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 7, type: default, offset: 88, size: 8, alignment: 8, stack-id: default, 
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 8, type: default, offset: 96, size: 8, alignment: 16, stack-id: default, 
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 9, type: default, offset: 104, size: 8, alignment: 8, stack-id: default, 
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 10, type: default, offset: 112, size: 8, alignment: 16, stack-id: default, 
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 11, type: default, offset: 120, size: 8, alignment: 8, stack-id: default, 
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 12, type: default, offset: 128, size: 8, alignment: 16, stack-id: default, 
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:           []
entry_values:    []
callSites:       []
debugValueSubstitutions: []
constants:
  - id:              0
    value:           float 0x7FF8000000000000
    alignment:       4
    isTargetSpecific: false
  - id:              1
    value:           'float 1.000000e+00'
    alignment:       4
    isTargetSpecific: false
  - id:              2
    value:           '<4 x float> splat (float 1.000000e+00)'
    alignment:       16
    isTargetSpecific: false
machineFunctionInfo:
  amxProgModel:    None
body:             |
  bb.0.bb:
    successors: %bb.1(0x80000000)
    liveins: $rcx, $rdx, $r8, $r9
  
    %51:gr64 = MOV64rm %fixed-stack.11, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.11)
    %50:vr128x = VMOVAPSZ128rm %51, 1, $noreg, 0, $noreg :: (load (s128))
    %52:gr64 = MOV64rm %fixed-stack.10, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.10, align 16)
    %49:vr128x = VMOVAPSZ128rm %52, 1, $noreg, 0, $noreg :: (load (s128))
    %53:gr64 = MOV64rm %fixed-stack.7, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.7)
    %46:vr128x = VMOVAPSZ128rm %53, 1, $noreg, 0, $noreg :: (load (s128))
    %54:gr64 = MOV64rm %fixed-stack.6, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.6, align 16)
    %45:vr128x = VMOVAPSZ128rm %54, 1, $noreg, 0, $noreg :: (load (s128))
    %55:gr64 = MOV64rm %fixed-stack.5, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.5)
    %44:vr128x = VMOVAPSZ128rm %55, 1, $noreg, 0, $noreg :: (load (s128))
    %56:gr64 = MOV64rm %fixed-stack.4, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.4, align 16)
    %43:vr128x = VMOVAPSZ128rm %56, 1, $noreg, 0, $noreg :: (load (s128))
    %38:gr64 = COPY $r9
    %37:gr64 = COPY $r8
    %36:gr64 = COPY $rdx
    %35:gr64 = COPY $rcx
    %57:gr64 = MOV64rm %fixed-stack.9, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.9)
    %58:vr128x = VPSLLDZ128mi %57, 1, $noreg, 0, $noreg, 31 :: (load (s128))
    %48:vk16wm = VPMOVD2MZ128kr %58
    %59:gr64 = MOV64rm %fixed-stack.8, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.8, align 16)
    %60:vr128x = VPSLLDZ128mi %59, 1, $noreg, 0, $noreg, 31 :: (load (s128))
    %47:vk16wm = VPMOVD2MZ128kr %60
    %42:gr8 = MOV8rm %fixed-stack.3, 1, $noreg, 0, $noreg :: (load (s8) from %fixed-stack.3, align 8)
    %41:fr32x = VMOVSSZrm_alt %fixed-stack.2, 1, $noreg, 0, $noreg :: (load (s32) from %fixed-stack.2, align 16)
    %40:fr32x = VMOVSSZrm_alt %fixed-stack.1, 1, $noreg, 0, $noreg :: (load (s32) from %fixed-stack.1, align 8)
    %39:gr64 = MOV64rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.0, align 16)
    undef %65.sub_32bit:gr64_with_sub_8bit = MOV32r0 implicit-def dead $eflags
    %67:vr256 = AVX2_SETALLONES
    %71:gr8 = MOV8ri 1
    %109:vr256x = AVX512_256_SET0
    %111:vr128x = AVX512_128_SET0
    %99:vr128x = VBROADCASTSSZ128rm $rip, 1, $noreg, %const.1, $noreg :: (load (s32) from constant-pool)
    %79:vr128x = VBROADCASTSSZ128rm $rip, 1, $noreg, %const.0, $noreg :: (load (s32) from constant-pool)
  
  bb.1.bb17:
    successors: %bb.2(0x80000000)
  
  bb.2.bb18:
    successors: %bb.3(0x80000000)
  
    undef %123.sub_32bit:gr64_with_sub_8bit = MOV32r0 implicit-def dead $eflags
  
  bb.3.bb19:
    successors: %bb.4(0x04000000), %bb.5(0x7c000000)
  
    VMOVSSZmr $noreg, 1, $noreg, 0, $noreg, %41 :: (store (s32) into `ptr null`)
    TEST64rr %123, %123, implicit-def $eflags
    JCC_1 %bb.5, 5, implicit $eflags
    JMP_1 %bb.4
  
  bb.4.bb20:
    successors: %bb.6(0x04000000), %bb.2(0x7c000000)
  
    ADJCALLSTACKDOWN64 32, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
    dead $ecx = MOV32r0 implicit-def dead $eflags, implicit-def $rcx
    dead $edx = MOV32r0 implicit-def dead $eflags, implicit-def $rdx
    $r8d = MOV32r0 implicit-def dead $eflags
    CALL64r %65, csr_win64, implicit $rsp, implicit $ssp, implicit $rcx, implicit $rdx, implicit $r8d, implicit-def $rsp, implicit-def $ssp
    ADJCALLSTACKUP64 32, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
    TEST8ri %42, 1, implicit-def $eflags
    JCC_1 %bb.6, 5, implicit $eflags
    JMP_1 %bb.2
  
  bb.5.bb21:
    successors: %bb.3(0x80000000)
  
    %123:gr64_with_sub_8bit = MOV32ri64 1
    JMP_1 %bb.3
  
  bb.6.bb22:
    successors: %bb.1(0x40000000), %bb.7(0x40000000)
    liveins: $eflags
  
    VMOVSSZmr $noreg, 1, $noreg, 0, $noreg, %40 :: (store (s32) into `ptr null`, align 1)
    JCC_1 %bb.1, 5, implicit $eflags
    JMP_1 %bb.7
  
  bb.7.bb23:
    successors: %bb.8(0x80000000)
  
    %124:vr256x = AVX512_256_SET0
    JMP_1 %bb.8
  
  bb.8.bb25:
    successors: %bb.9(0x04000000), %bb.8(0x7c000000)
  
    %124:vr256x = VPSUBQZ256rr %124, %67
    TEST8ri %42, 1, implicit-def $eflags
    JCC_1 %bb.8, 4, implicit $eflags
    JMP_1 %bb.9
  
  bb.9.bb28:
    successors: %bb.10(0x80000000)
  
    %125:vr256x = AVX512_256_SET0
    %126:vr256x = AVX512_256_SET0
    %127:vr256x = AVX512_256_SET0
    %128:vr256x = AVX512_256_SET0
    %129:vr256x = AVX512_256_SET0
    %130:vr256x = AVX512_256_SET0
    %131:vr256x = AVX512_256_SET0
    %132:vr256x = AVX512_256_SET0
    %133:vr256x = AVX512_256_SET0
    %134:vr256x = AVX512_256_SET0
  
  bb.10.bb29:
    successors: %bb.12(0x30000000), %bb.11(0x50000000)
  
    %13:vr128x = VMOVUPSZ128rm %37, 1, $noreg, 0, $noreg :: (load (s128) from %ir.arg2, align 4)
    %14:vr128x = VMOVUPSZ128rm %38, 1, $noreg, 0, $noreg :: (load (s128) from %ir.arg3, align 4)
    %137:vr128x = AVX512_128_SET0
    %15:vr128x = nofpexcept VMULPSZ128rr %43, %137, implicit $mxcsr
    %17:vr128x = VMOVUPSZ128rm $noreg, 1, $noreg, 0, $noreg :: (load (s128) from `ptr null`, align 1)
    %18:vr128x = VMOVUPSZ128rm %35, 1, $noreg, 0, $noreg :: (load (s128) from %ir.arg, align 4)
    %16:vr128x = nofpexcept VMULPSZ128rr %45, %137, implicit $mxcsr
    %19:vr128x = VMOVUPSZ128rm %39, 1, $noreg, 0, $noreg :: (load (s128) from %ir.arg4, align 4)
    %135:vr256x = AVX512_256_SET0
    %136:vr128x = AVX512_128_SET0
    TEST8rr %71, %71, implicit-def $eflags
    JCC_1 %bb.12, 5, implicit $eflags
    JMP_1 %bb.11
  
  bb.11.bb47:
    successors: %bb.12(0x80000000)
  
    %136:vr128x = VMOVUPSZ128rm %36, 1, $noreg, 0, $noreg :: (load (s128) from %ir.arg1, align 4)
    VMOVUPSZ128mrk $noreg, 1, $noreg, 0, $noreg, %48, %111 :: (store unknown-size into `ptr null`, align 1)
    VMOVUPSZ128mrk $noreg, 1, $noreg, 0, $noreg, %47, %16 :: (store unknown-size into `ptr null`, align 1)
    %116:vr128x = nnan ninf nsz arcp contract afn reassoc VRCP14PSZ128r %15, implicit $mxcsr
    %113:vr128x = VMOVAPSZ128rm $rip, 1, $noreg, %const.2, $noreg :: (invariant load (s128) from constant-pool)
    %115:vr128x = nofpexcept VMULPSZ128rr %116, %50, implicit $mxcsr
    %116:vr128x = nofpexcept VFMSUB213PSZ128r %116, %15, %113, implicit $mxcsr
    %116:vr128x = nofpexcept VFMSUB213PSZ128r %116, %43, %43, implicit $mxcsr
    %117:vr128x = AVX512_128_SET0
    %116:vr128x = nofpexcept VFNMADD213PSZ128r %116, %115, %117, implicit $mxcsr
    VMOVUPSZ128mrk $noreg, 1, $noreg, 0, $noreg, %48, %116 :: (store unknown-size into `ptr null`, align 1)
    %78:vr128x = ninf arcp VRCP14PSZ128r %46, implicit $mxcsr
    %80:vr128x = ninf arcp nofpexcept VMULPSZ128rr %78, %79, implicit $mxcsr
    %81:vr128x = ninf arcp nofpexcept VMULPSZ128rr %46, %80, implicit $mxcsr
    %82:vr128x = ninf arcp nofpexcept VSUBPSZ128rr %79, %81, implicit $mxcsr
    %83:vr128x = ninf arcp nofpexcept VMULPSZ128rr %78, %82, implicit $mxcsr
    %84:vr128x = ninf arcp nofpexcept VADDPSZ128rr %80, %83, implicit $mxcsr
    VMOVUPSZ128mrk $noreg, 1, $noreg, 0, $noreg, %47, %111 :: (store unknown-size into `ptr null`, align 1)
    %85:vr128x = nofpexcept VMULPSZ128rr %84, %46, implicit $mxcsr
    VMOVUPSZ128mrk $noreg, 1, $noreg, 0, $noreg, %48, %111 :: (store unknown-size into `ptr null`, align 1)
    %90:vr128x = nnan ninf nsz arcp contract afn reassoc VRCP14PSZ128r %49, implicit $mxcsr
    %119:vr128x = nofpexcept VMULPSZ128rr %90, %45, implicit $mxcsr
    %90:vr128x = nofpexcept VFMSUB213PSZ128r %90, %49, %113, implicit $mxcsr
    %90:vr128x = nofpexcept VFNMADD213PSZ128r %90, %119, %119, implicit $mxcsr
    VMOVUPSZ128mrk %35, 1, $noreg, 0, $noreg, %47, %90 :: (store unknown-size into %ir.arg, align 1)
    %91:vr128x = nofpexcept VMULPSZ128rr %85, %44, implicit $mxcsr
    %93:vr128x = nofpexcept VSUBPSZ128rr %99, %91, implicit $mxcsr
    VMOVUPSZ128mrk $noreg, 1, $noreg, 0, $noreg, %47, %93 :: (store unknown-size into `ptr null`, align 1)
    %94:vr128x = nnan ninf nsz arcp contract afn reassoc VRCP14PSZ128r %136, implicit $mxcsr
    %136:vr128x = nofpexcept VFMSUB213PSZ128r %136, %94, %113, implicit $mxcsr
    %121:vr128x = nofpexcept VMULPSZ128rr %84, %43, implicit $mxcsr
    %136:vr128x = nofpexcept VFMSUB213PSZ128r %136, %94, %94, implicit $mxcsr
    %136:vr128x = nofpexcept VFNMADD213PSZ128r %136, %121, %117, implicit $mxcsr
    %135:vr256x = COPY %126
  
  bb.12.bb58:
    successors: %bb.14(0x30000000), %bb.13(0x50000000)
  
    TEST8rr %71, %71, implicit-def $eflags
    JCC_1 %bb.14, 5, implicit $eflags
    JMP_1 %bb.13
  
  bb.13.bb63:
    successors: %bb.14(0x80000000)
  
    %100:vr128x = ninf arcp VRCP14PSZ128r %15, implicit $mxcsr
    %101:vr128x = ninf arcp nofpexcept VMULPSZ128rr %16, %100, implicit $mxcsr
    %102:vr128x = ninf arcp nofpexcept VMULPSZ128rr %15, %101, implicit $mxcsr
    %103:vr128x = ninf arcp nofpexcept VSUBPSZ128rr %16, %102, implicit $mxcsr
    %104:vr128x = ninf arcp nofpexcept VMULPSZ128rr %100, %103, implicit $mxcsr
    %105:vr128x = ninf arcp nofpexcept VADDPSZ128rr %101, %104, implicit $mxcsr
    %106:vr128x = nofpexcept VMULPSZ128rr %105, %13, implicit $mxcsr
    VMOVUPSZ128mrk $noreg, 1, $noreg, 0, $noreg, %47, %106 :: (store unknown-size into `ptr null`, align 1)
    VMOVUPSZ128mrk %35, 1, $noreg, 0, $noreg, %47, %50 :: (store unknown-size into %ir.arg, align 1)
    VMOVUPSZ128mrk $noreg, 1, $noreg, 0, $noreg, %47, %14 :: (store unknown-size into `ptr null`, align 1)
    %107:vr128x = nofpexcept VMULPSZ128rr %17, %19, implicit $mxcsr
    %108:vr128x = nofpexcept VMULPSZ128rr %107, %18, implicit $mxcsr
    VMOVUPSZ128mrk $noreg, 1, $noreg, 0, $noreg, %48, %108 :: (store unknown-size into `ptr null`, align 1)
    %137:vr128x = COPY %99
  
  bb.14.bb70:
    successors: %bb.15(0x04000000), %bb.10(0x7c000000)
  
    %125:vr256x = VMOVDQA64Z256rrkz %47, %125
    %127:vr256x = VMOVDQA64Z256rrkz %47, %127
    %128:vr256x = VMOVDQA64Z256rrkz %47, %128
    %129:vr256x = VMOVDQA64Z256rrkz %47, %129
    %130:vr256x = VMOVDQA64Z256rrkz %47, %130
    %131:vr256x = VMOVDQA64Z256rrk %131, %47, %109
    %132:vr256x = VMOVDQA64Z256rrk %132, %47, %109
    %133:vr256x = VMOVDQA64Z256rrk %133, %47, %109
    %134:vr256x = VMOVDQA64Z256rrk %134, %47, %109
    %136:vr128x = VMOVAPSZ128rrk %136, %47, %137
    VMOVUPSZ128mr $noreg, 1, $noreg, 0, $noreg, %111 :: (store (s128) into `ptr null`, align 4)
    VMOVUPSZ128mr %35, 1, $noreg, 0, $noreg, %44 :: (store (s128) into %ir.arg, align 1)
    %112:vr128x = nofpexcept VSUBPSZ128rr %111, %136, implicit $mxcsr
    VMOVUPSZ128mr $noreg, 1, $noreg, 0, $noreg, %112 :: (store (s128) into `ptr null`, align 1)
    %126:vr256x = COPY %135
    TEST8ri %42, 1, implicit-def $eflags
    JCC_1 %bb.10, 4, implicit $eflags
    JMP_1 %bb.15
  
  bb.15.bb85:
    successors: %bb.1(0x80000000)
  
    MOV64mi32 $noreg, 1, $noreg, 0, $noreg, 0 :: (store (s64) into `ptr null`)
    JMP_1 %bb.1
...