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llvm source #1
Output
Compile to binary object
Link to binary
Execute the code
Intel asm syntax
Demangle identifiers
Verbose demangling
Filters
Unused labels
Library functions
Directives
Comments
Horizontal whitespace
Debug intrinsics
Compiler
clang (assertions trunk)
clang (trunk)
clang 10.0.0
clang 10.0.1
clang 11.0.0
clang 11.0.1
clang 12.0.0
clang 12.0.1
clang 13.0.0
clang 14.0.0
clang 15.0.0
clang 16.0.0
clang 17.0.1
clang 18.1.0
clang 19.1.0
clang 4.0.1
clang 5.0.0
clang 6.0.0
clang 7.0.0
clang 8.0.0
clang 9.0.0
llc (assertions trunk)
llc (trunk)
llc 10.0.0
llc 10.0.1
llc 11.0.0
llc 11.0.1
llc 12.0.0
llc 12.0.1
llc 13.0.0
llc 14.0.0
llc 15.0.0
llc 16.0.0
llc 17.0.1
llc 18.1.0
llc 19.1.0
llc 3.2
llc 3.3
llc 3.9.1
llc 4.0.0
llc 4.0.1
llc 5.0.0
llc 6.0.0
llc 7.0.0
llc 8.0.0
llc 9.0.0
opt (assertions trunk)
opt (trunk)
opt 10.0.0
opt 10.0.1
opt 11.0.0
opt 11.0.1
opt 12.0.0
opt 12.0.1
opt 13.0.0
opt 14.0.0
opt 15.0.0
opt 16.0.0
opt 17.0.1
opt 18.1.0
opt 19.1.0
opt 3.2
opt 3.3
opt 3.9.1
opt 4.0.0
opt 4.0.1
opt 5.0.0
opt 6.0.0
opt 7.0.0
opt 8.0.0
opt 9.0.0
Options
Source code
define void @vf32(<32 x i16>* %in.vecptr0, <32 x i16>* %in.vecptr1, <32 x i16>* %in.vecptr2, <96 x i16>* %out.vec) nounwind { %in.vec0 = load <32 x i16>, <32 x i16>* %in.vecptr0, align 32 %in.vec1 = load <32 x i16>, <32 x i16>* %in.vecptr1, align 32 %in.vec2 = load <32 x i16>, <32 x i16>* %in.vecptr2, align 32 tail call void asm sideeffect "# LLVM-MCA-BEGIN", "~{dirflag},~{fpsr},~{flags}"() %concat01 = shufflevector <32 x i16> %in.vec0, <32 x i16> %in.vec1, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63> %concat2u = shufflevector <32 x i16> %in.vec2, <32 x i16> poison, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %concat012 = shufflevector <64 x i16> %concat01, <64 x i16> %concat2u, <96 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95> %interleaved.vec = shufflevector <96 x i16> %concat012, <96 x i16> poison, <96 x i32> <i32 0, i32 32, i32 64, i32 1, i32 33, i32 65, i32 2, i32 34, i32 66, i32 3, i32 35, i32 67, i32 4, i32 36, i32 68, i32 5, i32 37, i32 69, i32 6, i32 38, i32 70, i32 7, i32 39, i32 71, i32 8, i32 40, i32 72, i32 9, i32 41, i32 73, i32 10, i32 42, i32 74, i32 11, i32 43, i32 75, i32 12, i32 44, i32 76, i32 13, i32 45, i32 77, i32 14, i32 46, i32 78, i32 15, i32 47, i32 79, i32 16, i32 48, i32 80, i32 17, i32 49, i32 81, i32 18, i32 50, i32 82, i32 19, i32 51, i32 83, i32 20, i32 52, i32 84, i32 21, i32 53, i32 85, i32 22, i32 54, i32 86, i32 23, i32 55, i32 87, i32 24, i32 56, i32 88, i32 25, i32 57, i32 89, i32 26, i32 58, i32 90, i32 27, i32 59, i32 91, i32 28, i32 60, i32 92, i32 29, i32 61, i32 93, i32 30, i32 62, i32 94, i32 31, i32 63, i32 95> tail call void asm sideeffect "# LLVM-MCA-END", "~{dirflag},~{fpsr},~{flags}"() store <96 x i16> %interleaved.vec, <96 x i16>* %out.vec, align 32 ret void }
analysis source #2
Output
Compile to binary object
Link to binary
Execute the code
Intel asm syntax
Demangle identifiers
Verbose demangling
Filters
Unused labels
Library functions
Directives
Comments
Horizontal whitespace
Debug intrinsics
Compiler
OSACA (0.6.1)
llvm-mca (assertions trunk)
llvm-mca (trunk)
Options
Source code
vpshufd xmm1, xmm4, 165 # xmm1 = xmm4[1,1,2,2] vpshuflw xmm2, xmm3, 255 # xmm2 = xmm3[3,3,3,3,4,5,6,7] vpshufhw xmm2, xmm2, 0 # xmm2 = xmm2[0,1,2,3,4,4,4,4] vpblendw xmm1, xmm1, xmm2, 36 # xmm1 = xmm1[0,1],xmm2[2],xmm1[3,4],xmm2[5],xmm1[6,7] vpunpcklwd xmm2, xmm4, xmm3 # xmm2 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3] vmovdqa xmm10, xmmword ptr [rip + .LCPI0_0] # xmm10 = [0,1,2,3,4,5,4,5,6,7,10,11,8,9,10,11] vpshufb xmm2, xmm2, xmm10 vinserti128 ymm1, ymm2, xmm1, 1 vmovdqa ymm8, ymmword ptr [rip + .LCPI0_1] # ymm8 = <u,0,0,u,1,1,u,2> vpermd ymm2, ymm8, ymm6 vmovdqa ymm4, ymmword ptr [rip + .LCPI0_2] # ymm4 = [255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255] vpblendvb ymm3, ymm2, ymm1, ymm4 vpunpckhwd xmm1, xmm7, xmm0 # xmm1 = xmm7[4],xmm0[4],xmm7[5],xmm0[5],xmm7[6],xmm0[6],xmm7[7],xmm0[7] vmovdqa xmm12, xmmword ptr [rip + .LCPI0_3] # xmm12 = [8,9,4,5,10,11,6,7,8,9,14,15,12,13,12,13] vpshufb xmm1, xmm1, xmm12 vpshufd xmm0, xmm0, 165 # xmm0 = xmm0[1,1,2,2] vpshufd xmm2, xmm7, 165 # xmm2 = xmm7[1,1,2,2] vpblendw xmm0, xmm2, xmm0, 146 # xmm0 = xmm2[0],xmm0[1],xmm2[2,3],xmm0[4],xmm2[5,6],xmm0[7] vinserti128 ymm0, ymm0, xmm1, 1 vmovdqa ymm11, ymmword ptr [rip + .LCPI0_4] # ymm11 = <u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,26,27,24,25,22,23,28,29,30,31,30,31,30,31,30,31> vpshufb ymm1, ymm5, ymm11 vpermq ymm1, ymm1, 234 # ymm1 = ymm1[2,2,2,3] vpblendvb ymm9, ymm1, ymm0, ymm4 vmovdqa ymm0, ymmword ptr [rip + .LCPI0_5] # ymm0 = [10,11,0,1,12,13,12,13,2,3,2,3,14,15,4,5,26,27,16,17,28,29,28,29,18,19,18,19,30,31,20,21] vpshufb ymm1, ymm5, ymm0 vmovdqa ymm2, ymmword ptr [rip + .LCPI0_6] # ymm2 = <2,u,3,3,u,4,4,u> vpermd ymm5, ymm2, ymm6 vmovdqa ymm6, ymmword ptr [rip + .LCPI0_7] # ymm6 = <255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255> vpblendvb ymm1, ymm5, ymm1, ymm6 vmovdqa xmm5, xmmword ptr [rdi + 32] vpshufb ymm0, ymm13, ymm0 vpermd ymm2, ymm2, ymm14 vpblendvb ymm0, ymm2, ymm0, ymm6 vpshufd xmm2, xmm5, 165 # xmm2 = xmm5[1,1,2,2] vpshuflw xmm6, xmm15, 255 # xmm6 = xmm15[3,3,3,3,4,5,6,7] vpshufhw xmm6, xmm6, 0 # xmm6 = xmm6[0,1,2,3,4,4,4,4] vpblendw xmm2, xmm2, xmm6, 36 # xmm2 = xmm2[0,1],xmm6[2],xmm2[3,4],xmm6[5],xmm2[6,7] vpunpcklwd xmm5, xmm5, xmm15 # xmm5 = xmm5[0],xmm15[0],xmm5[1],xmm15[1],xmm5[2],xmm15[2],xmm5[3],xmm15[3] vpshufb xmm5, xmm5, xmm10 vinserti128 ymm2, ymm5, xmm2, 1 vmovdqa xmm5, xmmword ptr [rdx + 48] vpermd ymm6, ymm8, ymm14 vmovdqa xmm7, xmmword ptr [rdi + 48] vpblendvb ymm2, ymm6, ymm2, ymm4 vpunpckhwd xmm6, xmm5, xmm7 # xmm6 = xmm5[4],xmm7[4],xmm5[5],xmm7[5],xmm5[6],xmm7[6],xmm5[7],xmm7[7] vpshufb xmm6, xmm6, xmm12 vpshufd xmm7, xmm7, 165 # xmm7 = xmm7[1,1,2,2] vpshufd xmm5, xmm5, 165 # xmm5 = xmm5[1,1,2,2] vpblendw xmm5, xmm5, xmm7, 146 # xmm5 = xmm5[0],xmm7[1],xmm5[2,3],xmm7[4],xmm5[5,6],xmm7[7] vinserti128 ymm5, ymm5, xmm6, 1 vpshufb ymm6, ymm13, ymm11 vmovdqa ymm7, ymmword ptr [rdi] vpermq ymm6, ymm6, 234 # ymm6 = ymm6[2,2,2,3] vpblendvb ymm5, ymm6, ymm5, ymm4 vmovdqa ymm6, ymmword ptr [rip + .LCPI0_8] # ymm6 = <u,3,3,u,4,4,u,5> vpermd ymm7, ymm6, ymm7 vpblendvb ymm1, ymm7, ymm1, ymm4 vmovdqa ymm7, ymmword ptr [rdi + 32] vpermd ymm6, ymm6, ymm7 vpblendvb ymm0, ymm6, ymm0, ymm4
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