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llvm source #1
Output
Compile to binary object
Link to binary
Execute the code
Intel asm syntax
Demangle identifiers
Verbose demangling
Filters
Unused labels
Library functions
Directives
Comments
Horizontal whitespace
Debug intrinsics
Compiler
clang (assertions trunk)
clang (trunk)
clang 10.0.0
clang 10.0.1
clang 11.0.0
clang 11.0.1
clang 12.0.0
clang 12.0.1
clang 13.0.0
clang 14.0.0
clang 15.0.0
clang 16.0.0
clang 17.0.1
clang 18.1.0
clang 19.1.0
clang 4.0.1
clang 5.0.0
clang 6.0.0
clang 7.0.0
clang 8.0.0
clang 9.0.0
llc (assertions trunk)
llc (trunk)
llc 10.0.0
llc 10.0.1
llc 11.0.0
llc 11.0.1
llc 12.0.0
llc 12.0.1
llc 13.0.0
llc 14.0.0
llc 15.0.0
llc 16.0.0
llc 17.0.1
llc 18.1.0
llc 19.1.0
llc 3.2
llc 3.3
llc 3.9.1
llc 4.0.0
llc 4.0.1
llc 5.0.0
llc 6.0.0
llc 7.0.0
llc 8.0.0
llc 9.0.0
opt (assertions trunk)
opt (trunk)
opt 10.0.0
opt 10.0.1
opt 11.0.0
opt 11.0.1
opt 12.0.0
opt 12.0.1
opt 13.0.0
opt 14.0.0
opt 15.0.0
opt 16.0.0
opt 17.0.1
opt 18.1.0
opt 19.1.0
opt 3.2
opt 3.3
opt 3.9.1
opt 4.0.0
opt 4.0.1
opt 5.0.0
opt 6.0.0
opt 7.0.0
opt 8.0.0
opt 9.0.0
Options
Source code
define void @load_i8_stride6_vf32(<192 x i8>* %in.vec, <32 x i8>* %out.vec0, <32 x i8>* %out.vec1, <32 x i8>* %out.vec2, <32 x i8>* %out.vec3, <32 x i8>* %out.vec4, <32 x i8>* %out.vec5) nounwind { %wide.vec = load <192 x i8>, <192 x i8>* %in.vec, align 32 tail call void asm sideeffect "# LLVM-MCA-BEGIN", "~{dirflag},~{fpsr},~{flags}"() %strided.vec0 = shufflevector <192 x i8> %wide.vec, <192 x i8> poison, <32 x i32> <i32 0, i32 6, i32 12, i32 18, i32 24, i32 30, i32 36, i32 42, i32 48, i32 54, i32 60, i32 66, i32 72, i32 78, i32 84, i32 90, i32 96, i32 102, i32 108, i32 114, i32 120, i32 126, i32 132, i32 138, i32 144, i32 150, i32 156, i32 162, i32 168, i32 174, i32 180, i32 186> %strided.vec1 = shufflevector <192 x i8> %wide.vec, <192 x i8> poison, <32 x i32> <i32 1, i32 7, i32 13, i32 19, i32 25, i32 31, i32 37, i32 43, i32 49, i32 55, i32 61, i32 67, i32 73, i32 79, i32 85, i32 91, i32 97, i32 103, i32 109, i32 115, i32 121, i32 127, i32 133, i32 139, i32 145, i32 151, i32 157, i32 163, i32 169, i32 175, i32 181, i32 187> %strided.vec2 = shufflevector <192 x i8> %wide.vec, <192 x i8> poison, <32 x i32> <i32 2, i32 8, i32 14, i32 20, i32 26, i32 32, i32 38, i32 44, i32 50, i32 56, i32 62, i32 68, i32 74, i32 80, i32 86, i32 92, i32 98, i32 104, i32 110, i32 116, i32 122, i32 128, i32 134, i32 140, i32 146, i32 152, i32 158, i32 164, i32 170, i32 176, i32 182, i32 188> %strided.vec3 = shufflevector <192 x i8> %wide.vec, <192 x i8> poison, <32 x i32> <i32 3, i32 9, i32 15, i32 21, i32 27, i32 33, i32 39, i32 45, i32 51, i32 57, i32 63, i32 69, i32 75, i32 81, i32 87, i32 93, i32 99, i32 105, i32 111, i32 117, i32 123, i32 129, i32 135, i32 141, i32 147, i32 153, i32 159, i32 165, i32 171, i32 177, i32 183, i32 189> %strided.vec4 = shufflevector <192 x i8> %wide.vec, <192 x i8> poison, <32 x i32> <i32 4, i32 10, i32 16, i32 22, i32 28, i32 34, i32 40, i32 46, i32 52, i32 58, i32 64, i32 70, i32 76, i32 82, i32 88, i32 94, i32 100, i32 106, i32 112, i32 118, i32 124, i32 130, i32 136, i32 142, i32 148, i32 154, i32 160, i32 166, i32 172, i32 178, i32 184, i32 190> %strided.vec5 = shufflevector <192 x i8> %wide.vec, <192 x i8> poison, <32 x i32> <i32 5, i32 11, i32 17, i32 23, i32 29, i32 35, i32 41, i32 47, i32 53, i32 59, i32 65, i32 71, i32 77, i32 83, i32 89, i32 95, i32 101, i32 107, i32 113, i32 119, i32 125, i32 131, i32 137, i32 143, i32 149, i32 155, i32 161, i32 167, i32 173, i32 179, i32 185, i32 191> tail call void asm sideeffect "# LLVM-MCA-END", "~{dirflag},~{fpsr},~{flags}"() store <32 x i8> %strided.vec0, <32 x i8>* %out.vec0, align 32 store <32 x i8> %strided.vec1, <32 x i8>* %out.vec1, align 32 store <32 x i8> %strided.vec2, <32 x i8>* %out.vec2, align 32 store <32 x i8> %strided.vec3, <32 x i8>* %out.vec3, align 32 store <32 x i8> %strided.vec4, <32 x i8>* %out.vec4, align 32 store <32 x i8> %strided.vec5, <32 x i8>* %out.vec5, align 32 ret void }
analysis source #2
Output
Compile to binary object
Link to binary
Execute the code
Intel asm syntax
Demangle identifiers
Verbose demangling
Filters
Unused labels
Library functions
Directives
Comments
Horizontal whitespace
Debug intrinsics
Compiler
OSACA (0.6.1)
llvm-mca (assertions trunk)
llvm-mca (trunk)
Options
Source code
vmovdqa ymm9, ymmword ptr [rip + .LCPI0_3] # ymm9 = <255,255,u,u,0,0,255,255,u,u,0,0,255,255,u,u,0,0,255,255,u,u,0,0,255,255,u,u,0,0,255,255> vpblendvb ymm7, ymm13, ymm14, ymm9 vpshufb xmm3, xmm7, xmmword ptr [rip + .LCPI0_4] # xmm3 = xmm7[0,6,12],zero,zero,zero,xmm7[4,10],zero,zero,zero,xmm7[u,u,u,u,u] vextracti128 xmm0, ymm7, 1 vpshufb xmm2, xmm0, xmmword ptr [rip + .LCPI0_5] # xmm2 = zero,zero,zero,xmm0[2,8,14],zero,zero,xmm0[0,6,12,u,u,u,u,u] vpor xmm2, xmm2, xmm3 vperm2i128 ymm3, ymm1, ymm4, 49 # ymm3 = ymm1[2,3],ymm4[2,3] vpshufb ymm8, ymm3, ymmword ptr [rip + .LCPI0_6] # ymm8 = zero,zero,zero,ymm3[2,8,14,u,u,u,u,u],zero,zero,zero,ymm3[4,10],zero,zero,zero,ymm3[18,24,30,u,u,u,u,u],zero,zero,zero,ymm3[20,26] vperm2i128 ymm4, ymm1, ymm4, 32 # ymm4 = ymm1[0,1],ymm4[0,1] vpshufb ymm1, ymm4, ymmword ptr [rip + .LCPI0_7] # ymm1 = ymm4[0,6,12],zero,zero,zero,zero,zero,zero,zero,zero,ymm4[2,8,14],zero,zero,ymm4[16,22,28],zero,zero,zero,zero,zero,zero,zero,zero,ymm4[18,24,30],zero,zero vpor ymm1, ymm8, ymm1 vmovdqa xmm8, xmmword ptr [rip + .LCPI0_8] # xmm8 = [255,255,255,255,255,255,255,255,255,255,255,0,0,0,0,0] vpblendvb ymm1, ymm1, ymm2, ymm8 vmovdqu ymmword ptr [rsp - 40], ymm1 # 32-byte Spill vpshufb xmm2, xmm7, xmmword ptr [rip + .LCPI0_11] # xmm2 = xmm7[1,7,13],zero,zero,zero,xmm7[5,11],zero,zero,zero,xmm7[u,u,u,u,u] vpshufb xmm0, xmm0, xmmword ptr [rip + .LCPI0_12] # xmm0 = zero,zero,zero,xmm0[3,9,15],zero,zero,xmm0[1,7,13,u,u,u,u,u] vpor xmm0, xmm0, xmm2 vpshufb ymm2, ymm3, ymmword ptr [rip + .LCPI0_13] # ymm2 = zero,zero,zero,ymm3[3,9,15,u,u,u,u,u],zero,zero,zero,ymm3[5,11],zero,zero,zero,ymm3[19,25,31,u,u,u,u,u],zero,zero,zero,ymm3[21,27] vpshufb ymm7, ymm4, ymmword ptr [rip + .LCPI0_14] # ymm7 = ymm4[1,7,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm4[3,9,15],zero,zero,ymm4[17,23,29],zero,zero,zero,zero,zero,zero,zero,zero,ymm4[19,25,31],zero,zero vpor ymm2, ymm7, ymm2 vpblendvb ymm0, ymm2, ymm0, ymm8 vmovdqu ymmword ptr [rsp - 72], ymm0 # 32-byte Spill vmovdqa ymm0, ymmword ptr [rip + .LCPI0_17] # ymm0 = <255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255> vpblendvb ymm2, ymm14, ymm13, ymm0 vextracti128 xmm1, ymm2, 1 vpshufb xmm0, xmm1, xmmword ptr [rip + .LCPI0_18] # xmm0 = zero,zero,zero,xmm1[4,10],zero,zero,zero,xmm1[2,8,14,u,u,u,u,u] vpshufb xmm7, xmm2, xmmword ptr [rip + .LCPI0_19] # xmm7 = xmm2[2,8,14],zero,zero,xmm2[0,6,12],zero,zero,zero,xmm2[u,u,u,u,u] vpor xmm0, xmm7, xmm0 vpshufb ymm7, ymm3, ymmword ptr [rip + .LCPI0_20] # ymm7 = zero,zero,zero,ymm3[4,10,u,u,u,u,u,u],zero,zero,ymm3[0,6,12],zero,zero,zero,ymm3[20,26,u,u,u,u,u,u],zero,zero,ymm3[16,22,28] vpshufb ymm10, ymm4, ymmword ptr [rip + .LCPI0_21] # ymm10 = ymm4[2,8,14],zero,zero,zero,zero,zero,zero,zero,zero,ymm4[4,10],zero,zero,zero,ymm4[18,24,30],zero,zero,zero,zero,zero,zero,zero,zero,ymm4[20,26],zero,zero,zero vpor ymm7, ymm10, ymm7 vmovdqa ymm15, ymmword ptr [rip + .LCPI0_0] # ymm15 = <u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u> vpblendvb ymm9, ymm12, ymm6, ymm9 vpblendvb ymm0, ymm7, ymm0, ymm8 vpshufb xmm1, xmm1, xmmword ptr [rip + .LCPI0_25] # xmm1 = zero,zero,zero,xmm1[5,11],zero,zero,zero,xmm1[3,9,15,u,u,u,u,u] vpshufb xmm2, xmm2, xmmword ptr [rip + .LCPI0_26] # xmm2 = xmm2[3,9,15],zero,zero,xmm2[1,7,13],zero,zero,zero,xmm2[u,u,u,u,u] vpor xmm1, xmm2, xmm1 vpshufb ymm2, ymm3, ymmword ptr [rip + .LCPI0_27] # ymm2 = zero,zero,zero,ymm3[5,11,u,u,u,u,u,u],zero,zero,ymm3[1,7,13],zero,zero,zero,ymm3[21,27,u,u,u,u,u,u],zero,zero,ymm3[17,23,29] vpshufb ymm7, ymm4, ymmword ptr [rip + .LCPI0_28] # ymm7 = ymm4[3,9,15],zero,zero,zero,zero,zero,zero,zero,zero,ymm4[5,11],zero,zero,zero,ymm4[19,25,31],zero,zero,zero,zero,zero,zero,zero,zero,ymm4[21,27],zero,zero,zero vpor ymm2, ymm7, ymm2 vpshufb xmm7, xmm9, xmmword ptr [rip + .LCPI0_15] # xmm7 = xmm9[u,u,u,u,u,0,6,12],zero,zero,zero,xmm9[4,10],zero,zero,zero vpblendvb ymm1, ymm2, ymm1, ymm8 vextracti128 xmm2, ymm9, 1 vpshufb xmm5, xmm2, xmmword ptr [rip + .LCPI0_16] # xmm5 = xmm2[u,u,u,u,u],zero,zero,zero,xmm2[2,8,14],zero,zero,xmm2[0,6,12] vpor xmm5, xmm5, xmm7 vinserti128 ymm5, ymm0, xmm5, 1 vmovdqa ymm11, ymmword ptr [rip + .LCPI0_22] # ymm11 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0,0,0,0,0,0,0,0,0,0,0] vpblendvb ymm8, ymm5, ymm0, ymm11 vpblendvb ymm10, ymm6, ymm12, ymm15 vpshufb xmm0, xmm9, xmmword ptr [rip + .LCPI0_23] # xmm0 = xmm9[u,u,u,u,u,1,7,13],zero,zero,zero,xmm9[5,11],zero,zero,zero vpshufb xmm2, xmm2, xmmword ptr [rip + .LCPI0_24] # xmm2 = xmm2[u,u,u,u,u],zero,zero,zero,xmm2[3,9,15],zero,zero,xmm2[1,7,13] vpor xmm0, xmm2, xmm0 vinserti128 ymm0, ymm0, xmm0, 1 vpblendvb ymm9, ymm0, ymm1, ymm11 vmovdqa ymm0, ymmword ptr [rip + .LCPI0_17] # ymm0 = <255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255> vpblendvb ymm0, ymm6, ymm12, ymm0 vextracti128 xmm1, ymm0, 1 vpshufb xmm2, xmm1, xmmword ptr [rip + .LCPI0_29] # xmm2 = xmm1[u,u,u,u,u],zero,zero,zero,xmm1[4,10],zero,zero,zero,xmm1[2,8,14] vpshufb xmm5, xmm0, xmmword ptr [rip + .LCPI0_30] # xmm5 = xmm0[u,u,u,u,u,2,8,14],zero,zero,xmm0[0,6,12],zero,zero,zero vpor xmm12, xmm5, xmm2 vpblendvb ymm5, ymm14, ymm13, ymm15 vextracti128 xmm6, ymm5, 1 vpshufb xmm7, xmm6, xmmword ptr [rip + .LCPI0_31] # xmm7 = zero,zero,xmm6[0,6,12],zero,zero,zero,xmm6[4,10,u,u,u,u,u,u] vpshufb xmm2, xmm5, xmmword ptr [rip + .LCPI0_32] # xmm2 = xmm5[4,10],zero,zero,zero,xmm5[2,8,14],zero,zero,xmm5[u,u,u,u,u,u] vpor xmm2, xmm2, xmm7 vpshufb ymm7, ymm4, ymmword ptr [rip + .LCPI0_33] # ymm7 = ymm4[4,10],zero,zero,zero,ymm4[u,u,u,u,u,0,6,12],zero,zero,zero,ymm4[20,26],zero,zero,zero,ymm4[u,u,u,u,u,16,22,28],zero,zero,zero vpshufb ymm13, ymm3, ymmword ptr [rip + .LCPI0_34] # ymm13 = zero,zero,ymm3[0,6,12],zero,zero,zero,zero,zero,zero,zero,zero,ymm3[2,8,14],zero,zero,ymm3[16,22,28],zero,zero,zero,zero,zero,zero,zero,zero,ymm3[18,24,30] vpor ymm7, ymm13, ymm7 vpblendw xmm2, xmm7, xmm2, 31 # xmm2 = xmm2[0,1,2,3,4],xmm7[5,6,7] vpblendd ymm2, ymm2, ymm7, 240 # ymm2 = ymm2[0,1,2,3],ymm7[4,5,6,7] vinserti128 ymm7, ymm0, xmm12, 1 vpblendvb ymm2, ymm7, ymm2, ymm11 vpshufb xmm1, xmm1, xmmword ptr [rip + .LCPI0_35] # xmm1 = xmm1[u,u,u,u,u],zero,zero,zero,xmm1[5,11],zero,zero,zero,xmm1[3,9,15] vpshufb xmm0, xmm0, xmmword ptr [rip + .LCPI0_36] # xmm0 = xmm0[u,u,u,u,u,3,9,15],zero,zero,xmm0[1,7,13],zero,zero,zero vpor xmm0, xmm0, xmm1 vpshufb xmm1, xmm6, xmmword ptr [rip + .LCPI0_37] # xmm1 = zero,zero,xmm6[1,7,13],zero,zero,zero,xmm6[5,11,u,u,u,u,u,u] vpshufb xmm5, xmm5, xmmword ptr [rip + .LCPI0_38] # xmm5 = xmm5[5,11],zero,zero,zero,xmm5[3,9,15],zero,zero,xmm5[u,u,u,u,u,u] vpor xmm1, xmm5, xmm1 vpshufb ymm4, ymm4, ymmword ptr [rip + .LCPI0_39] # ymm4 = ymm4[5,11],zero,zero,zero,ymm4[u,u,u,u,u,1,7,13],zero,zero,zero,ymm4[21,27],zero,zero,zero,ymm4[u,u,u,u,u,17,23,29],zero,zero,zero vpshufb ymm3, ymm3, ymmword ptr [rip + .LCPI0_40] # ymm3 = zero,zero,ymm3[1,7,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm3[3,9,15],zero,zero,ymm3[17,23,29],zero,zero,zero,zero,zero,zero,zero,zero,ymm3[19,25,31] vpor ymm3, ymm3, ymm4 vpblendw xmm1, xmm3, xmm1, 31 # xmm1 = xmm1[0,1,2,3,4],xmm3[5,6,7] vpblendd ymm1, ymm1, ymm3, 240 # ymm1 = ymm1[0,1,2,3],ymm3[4,5,6,7] vextracti128 xmm3, ymm10, 1 vinserti128 ymm0, ymm0, xmm0, 1 vpblendvb ymm0, ymm0, ymm1, ymm11 vpshufb xmm1, xmm3, xmmword ptr [rip + .LCPI0_1] # xmm1 = xmm3[u,u,u,u,u,u],zero,zero,xmm3[0,6,12],zero,zero,zero,xmm3[4,10] vpshufb xmm4, xmm10, xmmword ptr [rip + .LCPI0_2] # xmm4 = xmm10[u,u,u,u,u,u,4,10],zero,zero,zero,xmm10[2,8,14],zero,zero vpor xmm1, xmm4, xmm1 vinserti128 ymm1, ymm0, xmm1, 1 vmovdqu ymm4, ymmword ptr [rsp - 40] # 32-byte Reload vpblendw ymm1, ymm4, ymm1, 248 # ymm1 = ymm4[0,1,2],ymm1[3,4,5,6,7],ymm4[8,9,10],ymm1[11,12,13,14,15] vpblendd ymm1, ymm4, ymm1, 240 # ymm1 = ymm4[0,1,2,3],ymm1[4,5,6,7] vpshufb xmm3, xmm3, xmmword ptr [rip + .LCPI0_9] # xmm3 = xmm3[u,u,u,u,u,u],zero,zero,xmm3[1,7,13],zero,zero,zero,xmm3[5,11] vpshufb xmm4, xmm10, xmmword ptr [rip + .LCPI0_10] # xmm4 = xmm10[u,u,u,u,u,u,5,11],zero,zero,zero,xmm10[3,9,15],zero,zero vpor xmm3, xmm4, xmm3 vinserti128 ymm3, ymm0, xmm3, 1 vmovdqu ymm4, ymmword ptr [rsp - 72] # 32-byte Reload vpblendw ymm3, ymm4, ymm3, 248 # ymm3 = ymm4[0,1,2],ymm3[3,4,5,6,7],ymm4[8,9,10],ymm3[11,12,13,14,15] vpblendd ymm3, ymm4, ymm3, 240 # ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7]
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