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# VLA transpose N 4x4 matrix of 16-bit elements stored in 4 vreg:
#   a b c d   A B C D   ...         a e i m   A E I M   ...
#   e f g h   E F G H   ... -----\  b f j n   B F J P   ...
#   i j k l   I J K L   ... -----/  c g k o   C G K O   ...
#   m n o p   M N O P   ...         d h l p   D H L P   ...

# Uses three instructions to implement arm NEONs trn1 and trn2:
# trn1: vor.vv(vand.vx, vsll.vi)
# trn2: vor.vv(vand.vx, vsrl.vi)

## setup code:
# li t1, 0xFFFFFFFF00000000
# li t2, 0xFFFFFFFF
# li t3, 0xFFFF0000
# li t4, 0xFFFF
# li t5, 32

vsetvli t0, x0, e64, m1, ta, ma

vand.vx v4, v0, t2
vsll.vx v5, v2, t5

vand.vx v6, v2, t1
vsrl.vx v7, v0, t5

vand.vx v8, v1, t2
vsll.vx v9, v3, t5

vand.vx v10, v3, t1
vsrl.vx v11, v1, t5

vor.vv v0, v4, v5
vor.vv v1, v6, v7
vor.vv v2, v8, v9
vor.vv v3, v10, v11

vsetvli t0, x0, e32, m1, ta, ma

vand.vx v4, v0, t4
vsll.vi v5, v2, 16

vand.vx v6, v2, t3
vsrl.vi v7, v0, 16

vand.vx v8, v1, t4
vsll.vi v9, v3, 16

vand.vx v10, v3, t3
vsrl.vi v11, v1, 16

vor.vv v0, v4, v5
vor.vv v1, v6, v7
vor.vv v2, v8, v9
vor.vv v3, v10, v11

# please prefer vor over vadd, it should be faster or as fast on sane implementations