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c++ source #1
Output
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Intel asm syntax
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Filters
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Debug intrinsics
Compiler
6502-c++ 11.1.0
ARM GCC 10.2.0
ARM GCC 10.3.0
ARM GCC 10.4.0
ARM GCC 10.5.0
ARM GCC 11.1.0
ARM GCC 11.2.0
ARM GCC 11.3.0
ARM GCC 11.4.0
ARM GCC 12.1.0
ARM GCC 12.2.0
ARM GCC 12.3.0
ARM GCC 13.1.0
ARM GCC 13.2.0
ARM GCC 13.2.0 (unknown-eabi)
ARM GCC 4.5.4
ARM GCC 4.6.4
ARM GCC 5.4
ARM GCC 6.3.0
ARM GCC 6.4.0
ARM GCC 7.3.0
ARM GCC 7.5.0
ARM GCC 8.2.0
ARM GCC 8.5.0
ARM GCC 9.3.0
ARM GCC 9.4.0
ARM GCC 9.5.0
ARM GCC trunk
ARM gcc 10.2.1 (none)
ARM gcc 10.3.1 (2021.07 none)
ARM gcc 10.3.1 (2021.10 none)
ARM gcc 11.2.1 (none)
ARM gcc 5.4.1 (none)
ARM gcc 7.2.1 (none)
ARM gcc 8.2 (WinCE)
ARM gcc 8.3.1 (none)
ARM gcc 9.2.1 (none)
ARM msvc v19.0 (WINE)
ARM msvc v19.10 (WINE)
ARM msvc v19.14 (WINE)
ARM64 Morello gcc 10.1 Alpha 2
ARM64 gcc 10.2
ARM64 gcc 10.3
ARM64 gcc 10.4
ARM64 gcc 10.5.0
ARM64 gcc 11.1
ARM64 gcc 11.2
ARM64 gcc 11.3
ARM64 gcc 11.4.0
ARM64 gcc 12.1
ARM64 gcc 12.2.0
ARM64 gcc 12.3.0
ARM64 gcc 13.1.0
ARM64 gcc 13.2.0
ARM64 gcc 5.4
ARM64 gcc 6.3
ARM64 gcc 6.4
ARM64 gcc 7.3
ARM64 gcc 7.5
ARM64 gcc 8.2
ARM64 gcc 8.5
ARM64 gcc 9.3
ARM64 gcc 9.4
ARM64 gcc 9.5
ARM64 gcc trunk
ARM64 msvc v19.14 (WINE)
AVR gcc 10.3.0
AVR gcc 11.1.0
AVR gcc 12.1.0
AVR gcc 12.2.0
AVR gcc 12.3.0
AVR gcc 13.1.0
AVR gcc 13.2.0
AVR gcc 4.5.4
AVR gcc 4.6.4
AVR gcc 5.4.0
AVR gcc 9.2.0
AVR gcc 9.3.0
Arduino Mega (1.8.9)
Arduino Uno (1.8.9)
BPF clang (trunk)
BPF clang 13.0.0
BPF clang 14.0.0
BPF clang 15.0.0
BPF clang 16.0.0
BPF clang 17.0.1
BPF clang 18.1.0
BPF gcc 13.1.0
BPF gcc 13.2.0
BPF gcc trunk
EDG (experimental reflection)
EDG 6.5
EDG 6.5 (GNU mode gcc 13)
EDG 6.6
EDG 6.6 (GNU mode gcc 13)
FRC 2019
FRC 2020
FRC 2023
KVX ACB 4.1.0 (GCC 7.5.0)
KVX ACB 4.1.0-cd1 (GCC 7.5.0)
KVX ACB 4.10.0 (GCC 10.3.1)
KVX ACB 4.11.1 (GCC 10.3.1)
KVX ACB 4.12.0 (GCC 11.3.0)
KVX ACB 4.2.0 (GCC 7.5.0)
KVX ACB 4.3.0 (GCC 7.5.0)
KVX ACB 4.4.0 (GCC 7.5.0)
KVX ACB 4.6.0 (GCC 9.4.1)
KVX ACB 4.8.0 (GCC 9.4.1)
KVX ACB 4.9.0 (GCC 9.4.1)
M68K gcc 13.1.0
M68K gcc 13.2.0
M68k clang (trunk)
MRISC32 gcc (trunk)
MSP430 gcc 4.5.3
MSP430 gcc 5.3.0
MSP430 gcc 6.2.1
MinGW clang 14.0.3
MinGW clang 14.0.6
MinGW clang 15.0.7
MinGW clang 16.0.0
MinGW clang 16.0.2
MinGW gcc 11.3.0
MinGW gcc 12.1.0
MinGW gcc 12.2.0
MinGW gcc 13.1.0
RISC-V (32-bits) gcc (trunk)
RISC-V (32-bits) gcc 10.2.0
RISC-V (32-bits) gcc 10.3.0
RISC-V (32-bits) gcc 11.2.0
RISC-V (32-bits) gcc 11.3.0
RISC-V (32-bits) gcc 11.4.0
RISC-V (32-bits) gcc 12.1.0
RISC-V (32-bits) gcc 12.2.0
RISC-V (32-bits) gcc 12.3.0
RISC-V (32-bits) gcc 13.1.0
RISC-V (32-bits) gcc 13.2.0
RISC-V (32-bits) gcc 8.2.0
RISC-V (32-bits) gcc 8.5.0
RISC-V (32-bits) gcc 9.4.0
RISC-V (64-bits) gcc (trunk)
RISC-V (64-bits) gcc 10.2.0
RISC-V (64-bits) gcc 10.3.0
RISC-V (64-bits) gcc 11.2.0
RISC-V (64-bits) gcc 11.3.0
RISC-V (64-bits) gcc 11.4.0
RISC-V (64-bits) gcc 12.1.0
RISC-V (64-bits) gcc 12.2.0
RISC-V (64-bits) gcc 12.3.0
RISC-V (64-bits) gcc 13.1.0
RISC-V (64-bits) gcc 13.2.0
RISC-V (64-bits) gcc 8.2.0
RISC-V (64-bits) gcc 8.5.0
RISC-V (64-bits) gcc 9.4.0
RISC-V rv32gc clang (trunk)
RISC-V rv32gc clang 10.0.0
RISC-V rv32gc clang 10.0.1
RISC-V rv32gc clang 11.0.0
RISC-V rv32gc clang 11.0.1
RISC-V rv32gc clang 12.0.0
RISC-V rv32gc clang 12.0.1
RISC-V rv32gc clang 13.0.0
RISC-V rv32gc clang 13.0.1
RISC-V rv32gc clang 14.0.0
RISC-V rv32gc clang 15.0.0
RISC-V rv32gc clang 16.0.0
RISC-V rv32gc clang 17.0.1
RISC-V rv32gc clang 18.1.0
RISC-V rv32gc clang 9.0.0
RISC-V rv32gc clang 9.0.1
RISC-V rv64gc clang (trunk)
RISC-V rv64gc clang 10.0.0
RISC-V rv64gc clang 10.0.1
RISC-V rv64gc clang 11.0.0
RISC-V rv64gc clang 11.0.1
RISC-V rv64gc clang 12.0.0
RISC-V rv64gc clang 12.0.1
RISC-V rv64gc clang 13.0.0
RISC-V rv64gc clang 13.0.1
RISC-V rv64gc clang 14.0.0
RISC-V rv64gc clang 15.0.0
RISC-V rv64gc clang 16.0.0
RISC-V rv64gc clang 17.0.1
RISC-V rv64gc clang 18.1.0
RISC-V rv64gc clang 9.0.0
RISC-V rv64gc clang 9.0.1
Raspbian Buster
Raspbian Stretch
SPARC LEON gcc 12.2.0
SPARC LEON gcc 12.3.0
SPARC LEON gcc 13.1.0
SPARC LEON gcc 13.2.0
SPARC gcc 12.2.0
SPARC gcc 12.3.0
SPARC gcc 13.1.0
SPARC gcc 13.2.0
SPARC64 gcc 12.2.0
SPARC64 gcc 12.3.0
SPARC64 gcc 13.1.0
SPARC64 gcc 13.2.0
TI C6x gcc 12.2.0
TI C6x gcc 12.3.0
TI C6x gcc 13.1.0
TI C6x gcc 13.2.0
TI CL430 21.6.1
VAX gcc NetBSDELF 10.4.0
VAX gcc NetBSDELF 10.5.0 (Nov 15 03:50:22 2023)
WebAssembly clang (trunk)
Xtensa ESP32 gcc 11.2.0 (2022r1)
Xtensa ESP32 gcc 12.2.0 (20230208)
Xtensa ESP32 gcc 8.2.0 (2019r2)
Xtensa ESP32 gcc 8.2.0 (2020r1)
Xtensa ESP32 gcc 8.2.0 (2020r2)
Xtensa ESP32 gcc 8.4.0 (2020r3)
Xtensa ESP32 gcc 8.4.0 (2021r1)
Xtensa ESP32 gcc 8.4.0 (2021r2)
Xtensa ESP32-S2 gcc 11.2.0 (2022r1)
Xtensa ESP32-S2 gcc 12.2.0 (20230208)
Xtensa ESP32-S2 gcc 8.2.0 (2019r2)
Xtensa ESP32-S2 gcc 8.2.0 (2020r1)
Xtensa ESP32-S2 gcc 8.2.0 (2020r2)
Xtensa ESP32-S2 gcc 8.4.0 (2020r3)
Xtensa ESP32-S2 gcc 8.4.0 (2021r1)
Xtensa ESP32-S2 gcc 8.4.0 (2021r2)
Xtensa ESP32-S3 gcc 11.2.0 (2022r1)
Xtensa ESP32-S3 gcc 12.2.0 (20230208)
Xtensa ESP32-S3 gcc 8.4.0 (2020r3)
Xtensa ESP32-S3 gcc 8.4.0 (2021r1)
Xtensa ESP32-S3 gcc 8.4.0 (2021r2)
arm64 msvc v19.28 VS16.9
arm64 msvc v19.29 VS16.10
arm64 msvc v19.29 VS16.11
arm64 msvc v19.30
arm64 msvc v19.31
arm64 msvc v19.32
arm64 msvc v19.33
arm64 msvc v19.34
arm64 msvc v19.35
arm64 msvc v19.36
arm64 msvc v19.37
arm64 msvc v19.38
arm64 msvc v19.latest
armv7-a clang (trunk)
armv7-a clang 10.0.0
armv7-a clang 10.0.1
armv7-a clang 11.0.0
armv7-a clang 11.0.1
armv7-a clang 9.0.0
armv7-a clang 9.0.1
armv8-a clang (all architectural features, trunk)
armv8-a clang (trunk)
armv8-a clang 10.0.0
armv8-a clang 10.0.1
armv8-a clang 11.0.0
armv8-a clang 11.0.1
armv8-a clang 12.0.0
armv8-a clang 13.0.0
armv8-a clang 14.0.0
armv8-a clang 15.0.0
armv8-a clang 16.0.0
armv8-a clang 17.0.1
armv8-a clang 18.1.0
armv8-a clang 9.0.0
armv8-a clang 9.0.1
ellcc 0.1.33
ellcc 0.1.34
ellcc 2017-07-16
hexagon-clang 16.0.5
llvm-mos atari2600-3e
llvm-mos atari2600-4k
llvm-mos atari2600-common
llvm-mos atari5200-supercart
llvm-mos atari8-cart-megacart
llvm-mos atari8-cart-std
llvm-mos atari8-cart-xegs
llvm-mos atari8-common
llvm-mos atari8-dos
llvm-mos c128
llvm-mos c64
llvm-mos commodore
llvm-mos cpm65
llvm-mos cx16
llvm-mos dodo
llvm-mos eater
llvm-mos mega65
llvm-mos nes
llvm-mos nes-action53
llvm-mos nes-cnrom
llvm-mos nes-gtrom
llvm-mos nes-mmc1
llvm-mos nes-mmc3
llvm-mos nes-nrom
llvm-mos nes-unrom
llvm-mos nes-unrom-512
llvm-mos osi-c1p
llvm-mos pce
llvm-mos pce-cd
llvm-mos pce-common
llvm-mos pet
llvm-mos rp6502
llvm-mos rpc8e
llvm-mos supervision
llvm-mos vic20
loongarch64 gcc 12.2.0
loongarch64 gcc 12.3.0
loongarch64 gcc 13.1.0
loongarch64 gcc 13.2.0
mips clang 13.0.0
mips clang 14.0.0
mips clang 15.0.0
mips clang 16.0.0
mips clang 17.0.1
mips clang 18.1.0
mips gcc 11.2.0
mips gcc 12.1.0
mips gcc 12.2.0
mips gcc 12.3.0
mips gcc 13.1.0
mips gcc 13.2.0
mips gcc 4.9.4
mips gcc 5.4
mips gcc 5.5.0
mips gcc 9.3.0 (codescape)
mips gcc 9.5.0
mips64 (el) gcc 12.1.0
mips64 (el) gcc 12.2.0
mips64 (el) gcc 12.3.0
mips64 (el) gcc 13.1.0
mips64 (el) gcc 13.2.0
mips64 (el) gcc 4.9.4
mips64 (el) gcc 5.4.0
mips64 (el) gcc 5.5.0
mips64 (el) gcc 9.5.0
mips64 clang 13.0.0
mips64 clang 14.0.0
mips64 clang 15.0.0
mips64 clang 16.0.0
mips64 clang 17.0.1
mips64 clang 18.1.0
mips64 gcc 11.2.0
mips64 gcc 12.1.0
mips64 gcc 12.2.0
mips64 gcc 12.3.0
mips64 gcc 13.1.0
mips64 gcc 13.2.0
mips64 gcc 4.9.4
mips64 gcc 5.4.0
mips64 gcc 5.5.0
mips64 gcc 9.5.0
mips64el clang 13.0.0
mips64el clang 14.0.0
mips64el clang 15.0.0
mips64el clang 16.0.0
mips64el clang 17.0.1
mips64el clang 18.1.0
mipsel clang 13.0.0
mipsel clang 14.0.0
mipsel clang 15.0.0
mipsel clang 16.0.0
mipsel clang 17.0.1
mipsel clang 18.1.0
mipsel gcc 12.1.0
mipsel gcc 12.2.0
mipsel gcc 12.3.0
mipsel gcc 13.1.0
mipsel gcc 13.2.0
mipsel gcc 4.9.4
mipsel gcc 5.4.0
mipsel gcc 5.5.0
mipsel gcc 9.5.0
nanoMIPS gcc 6.3.0 (mtk)
power gcc 11.2.0
power gcc 12.1.0
power gcc 12.2.0
power gcc 12.3.0
power gcc 13.1.0
power gcc 13.2.0
power gcc 4.8.5
power64 AT12.0 (gcc8)
power64 AT13.0 (gcc9)
power64 gcc 11.2.0
power64 gcc 12.1.0
power64 gcc 12.2.0
power64 gcc 12.3.0
power64 gcc 13.1.0
power64 gcc 13.2.0
power64 gcc trunk
power64le AT12.0 (gcc8)
power64le AT13.0 (gcc9)
power64le clang (trunk)
power64le gcc 11.2.0
power64le gcc 12.1.0
power64le gcc 12.2.0
power64le gcc 12.3.0
power64le gcc 13.1.0
power64le gcc 13.2.0
power64le gcc 6.3.0
power64le gcc trunk
powerpc64 clang (trunk)
s390x gcc 11.2.0
s390x gcc 12.1.0
s390x gcc 12.2.0
s390x gcc 12.3.0
s390x gcc 13.1.0
s390x gcc 13.2.0
sh gcc 12.2.0
sh gcc 12.3.0
sh gcc 13.1.0
sh gcc 13.2.0
sh gcc 4.9.4
sh gcc 9.5.0
vast (trunk)
x64 msvc v19.0 (WINE)
x64 msvc v19.10 (WINE)
x64 msvc v19.14
x64 msvc v19.14 (WINE)
x64 msvc v19.15
x64 msvc v19.16
x64 msvc v19.20
x64 msvc v19.21
x64 msvc v19.22
x64 msvc v19.23
x64 msvc v19.24
x64 msvc v19.25
x64 msvc v19.26
x64 msvc v19.27
x64 msvc v19.28
x64 msvc v19.28 VS16.9
x64 msvc v19.29 VS16.10
x64 msvc v19.29 VS16.11
x64 msvc v19.30
x64 msvc v19.31
x64 msvc v19.32
x64 msvc v19.33
x64 msvc v19.34
x64 msvc v19.35
x64 msvc v19.36
x64 msvc v19.37
x64 msvc v19.38
x64 msvc v19.latest
x86 djgpp 4.9.4
x86 djgpp 5.5.0
x86 djgpp 6.4.0
x86 djgpp 7.2.0
x86 msvc v19.0 (WINE)
x86 msvc v19.10 (WINE)
x86 msvc v19.14
x86 msvc v19.14 (WINE)
x86 msvc v19.15
x86 msvc v19.16
x86 msvc v19.20
x86 msvc v19.21
x86 msvc v19.22
x86 msvc v19.23
x86 msvc v19.24
x86 msvc v19.25
x86 msvc v19.26
x86 msvc v19.27
x86 msvc v19.28
x86 msvc v19.28 VS16.9
x86 msvc v19.29 VS16.10
x86 msvc v19.29 VS16.11
x86 msvc v19.30
x86 msvc v19.31
x86 msvc v19.32
x86 msvc v19.33
x86 msvc v19.34
x86 msvc v19.35
x86 msvc v19.36
x86 msvc v19.37
x86 msvc v19.38
x86 msvc v19.latest
x86 nvc++ 22.11
x86 nvc++ 22.7
x86 nvc++ 22.9
x86 nvc++ 23.1
x86 nvc++ 23.11
x86 nvc++ 23.3
x86 nvc++ 23.5
x86 nvc++ 23.7
x86 nvc++ 23.9
x86 nvc++ 24.1
x86 nvc++ 24.3
x86-64 Zapcc 190308
x86-64 clang (amd-stg-open)
x86-64 clang (assertions trunk)
x86-64 clang (clangir)
x86-64 clang (experimental -Wlifetime)
x86-64 clang (experimental P1061)
x86-64 clang (experimental P1144)
x86-64 clang (experimental P1221)
x86-64 clang (experimental P2996)
x86-64 clang (experimental metaprogramming - P2632)
x86-64 clang (experimental pattern matching)
x86-64 clang (old concepts branch)
x86-64 clang (reflection)
x86-64 clang (resugar)
x86-64 clang (thephd.dev)
x86-64 clang (trunk)
x86-64 clang (variadic friends - P2893)
x86-64 clang (widberg)
x86-64 clang 10.0.0
x86-64 clang 10.0.0 (assertions)
x86-64 clang 10.0.1
x86-64 clang 11.0.0
x86-64 clang 11.0.0 (assertions)
x86-64 clang 11.0.1
x86-64 clang 12.0.0
x86-64 clang 12.0.0 (assertions)
x86-64 clang 12.0.1
x86-64 clang 13.0.0
x86-64 clang 13.0.0 (assertions)
x86-64 clang 13.0.1
x86-64 clang 14.0.0
x86-64 clang 14.0.0 (assertions)
x86-64 clang 15.0.0
x86-64 clang 15.0.0 (assertions)
x86-64 clang 16.0.0
x86-64 clang 16.0.0 (assertions)
x86-64 clang 17.0.1
x86-64 clang 17.0.1 (assertions)
x86-64 clang 18.1.0
x86-64 clang 18.1.0 (assertions)
x86-64 clang 2.6.0 (assertions)
x86-64 clang 2.7.0 (assertions)
x86-64 clang 2.8.0 (assertions)
x86-64 clang 2.9.0 (assertions)
x86-64 clang 3.0.0
x86-64 clang 3.0.0 (assertions)
x86-64 clang 3.1
x86-64 clang 3.1 (assertions)
x86-64 clang 3.2
x86-64 clang 3.2 (assertions)
x86-64 clang 3.3
x86-64 clang 3.3 (assertions)
x86-64 clang 3.4 (assertions)
x86-64 clang 3.4.1
x86-64 clang 3.5
x86-64 clang 3.5 (assertions)
x86-64 clang 3.5.1
x86-64 clang 3.5.2
x86-64 clang 3.6
x86-64 clang 3.6 (assertions)
x86-64 clang 3.7
x86-64 clang 3.7 (assertions)
x86-64 clang 3.7.1
x86-64 clang 3.8
x86-64 clang 3.8 (assertions)
x86-64 clang 3.8.1
x86-64 clang 3.9.0
x86-64 clang 3.9.0 (assertions)
x86-64 clang 3.9.1
x86-64 clang 4.0.0
x86-64 clang 4.0.0 (assertions)
x86-64 clang 4.0.1
x86-64 clang 5.0.0
x86-64 clang 5.0.0 (assertions)
x86-64 clang 5.0.1
x86-64 clang 5.0.2
x86-64 clang 6.0.0
x86-64 clang 6.0.0 (assertions)
x86-64 clang 6.0.1
x86-64 clang 7.0.0
x86-64 clang 7.0.0 (assertions)
x86-64 clang 7.0.1
x86-64 clang 7.1.0
x86-64 clang 8.0.0
x86-64 clang 8.0.0 (assertions)
x86-64 clang 8.0.1
x86-64 clang 9.0.0
x86-64 clang 9.0.0 (assertions)
x86-64 clang 9.0.1
x86-64 clang rocm-4.5.2
x86-64 clang rocm-5.0.2
x86-64 clang rocm-5.1.3
x86-64 clang rocm-5.2.3
x86-64 clang rocm-5.3.3
x86-64 clang rocm-5.7.0
x86-64 gcc (contract labels)
x86-64 gcc (contracts natural syntax)
x86-64 gcc (contracts)
x86-64 gcc (coroutines)
x86-64 gcc (modules)
x86-64 gcc (trunk)
x86-64 gcc 10.1
x86-64 gcc 10.2
x86-64 gcc 10.3
x86-64 gcc 10.4
x86-64 gcc 10.5
x86-64 gcc 11.1
x86-64 gcc 11.2
x86-64 gcc 11.3
x86-64 gcc 11.4
x86-64 gcc 12.1
x86-64 gcc 12.2
x86-64 gcc 12.3
x86-64 gcc 13.1
x86-64 gcc 13.2
x86-64 gcc 4.1.2
x86-64 gcc 4.4.7
x86-64 gcc 4.5.3
x86-64 gcc 4.6.4
x86-64 gcc 4.7.1
x86-64 gcc 4.7.2
x86-64 gcc 4.7.3
x86-64 gcc 4.7.4
x86-64 gcc 4.8.1
x86-64 gcc 4.8.2
x86-64 gcc 4.8.3
x86-64 gcc 4.8.4
x86-64 gcc 4.8.5
x86-64 gcc 4.9.0
x86-64 gcc 4.9.1
x86-64 gcc 4.9.2
x86-64 gcc 4.9.3
x86-64 gcc 4.9.4
x86-64 gcc 5.1
x86-64 gcc 5.2
x86-64 gcc 5.3
x86-64 gcc 5.4
x86-64 gcc 5.5
x86-64 gcc 6.1
x86-64 gcc 6.2
x86-64 gcc 6.3
x86-64 gcc 6.4
x86-64 gcc 7.1
x86-64 gcc 7.2
x86-64 gcc 7.3
x86-64 gcc 7.4
x86-64 gcc 7.5
x86-64 gcc 8.1
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#include <cstdint> // stm32g031K8 //Reg.hpp //#pragma once #include <cstdint> #include <cstdbool> // struct/class/namespace - Upper // class methods - lower or lowerUpper // class constants - UPPER_ // template parameters - Upper_ // namespace w/only enums - UPPER // enums - UPPER // //================================================================================= // generic volatile register bit/read/write functions, basic version // compile time assert for alignment, only compile time known addresses will work //================================================================================= struct Reg { //write //write access size is matched to Val_ type size template<unsigned Addr_, typename Val_> static constexpr void regWr (const Val_ val) { constexpr unsigned ALIGNMASK_{ sizeof(Val_) > 4 ? 3 : sizeof(Val_)-1 }; static_assert(not (Addr_ bitand ALIGNMASK_),"Alignment error in Reg::regWr"); *(reinterpret_cast<volatile Val_*>(Addr_)) = val; } //read //32bit default, need to specify if 64, 16 or 8 bit - // read 8 bit - reg<0x1005, uint8_t>() // read 16 bit - reg<0x1002, uint16_t>() // read 64 bit - reg<0x1016, uint64_t>() template<unsigned Addr_, typename Ret_ = uint32_t> static constexpr Ret_ regRd () { constexpr unsigned ALIGNMASK_{ sizeof(Ret_) > 4 ? 3 : sizeof(Ret_)-1 }; static_assert(not (Addr_ bitand ALIGNMASK_),"Alignment error in Reg::regRd"); return *(reinterpret_cast<volatile Ret_*>(Addr_)); } //bits, will use underlying type of mask value to determine what kind //of register access (8,16,32,64 bit) //only do if mask not 0 //clear bit(s) in maskC, set all bit(s) in maskS (to set multi-bit values) template<unsigned Addr_, typename Mtyp_> static constexpr void setMask (const Mtyp_ maskC, const Mtyp_ maskS) { //use tmp so only get one write (vs putting in regWr argument) Mtyp_ tmp = regRd<Addr_, Mtyp_>() bitand compl maskC; regWr<Addr_, Mtyp_>( tmp bitor maskS ); } //clear all bits in mask template<unsigned Addr_, typename Mtyp_> static constexpr void clrBit (const Mtyp_ mask) { if( mask ) regWr<Addr_, Mtyp_>( regRd<Addr_,uint32_t>() bitand compl mask ); } //set all bit(s) in mask template<unsigned Addr_, typename Mtyp_> static constexpr void setBit (const Mtyp_ mask) { if( not mask ) return; regWr<Addr_, Mtyp_>( regRd<Addr_, Mtyp_>() bitor mask ); } //set all bit(s) in mask to tf (1,0) //allows setBit to also do clrBit, so do not need the if/else in calling code template<unsigned Addr_, typename Mtyp_> static constexpr void setBit (const Mtyp_ mask, bool tf){ if( not mask ) return; if( tf ) setBit<Addr_>( mask ); else clrBit<Addr_>( mask ); } //toggle all bit(s) in mask template<unsigned Addr_, typename Mtyp_> static constexpr void togBit (const Mtyp_ mask) { if( not mask ) return; regWr<Addr_, Mtyp_>( regRd<Addr_, Mtyp_>() xor mask ); } //if any bit is set in mask position(s), return true template<unsigned Addr_, typename Mtyp_> static constexpr bool anyBit (const Mtyp_ mask) { return regRd<Addr_, Mtyp_>() bitand mask; } }; //================================================================================= //Pins.hpp //#pragma once #include <cstdint> #include <cstdbool> //#include "Reg.hpp" //stm32g031 //================================================================================= // Pins namespace, used for Gpio template paramters //================================================================================= namespace PINS { enum MODE : unsigned { INPUT, OUTPUT, ALTERNATE, ANALOG }; enum OTYPE : unsigned { PUSHPULL, ODRAIN }; enum OSPEED : unsigned { SPEEDLOW, SPEEDMED, SPEEDHI, SPEEDVERYHI }; enum PULL : unsigned { PULLOFF, PULLUP, PULLDOWN }; //alternate version with struct for each pin, //to contain the alternate functions enum GPION { GPIOA, GPIOB, GPIOC, GPIOD, GPIOF = 5 }; enum GPION_ADDR : unsigned { BASE = 0x50000000, SPACING = 0x400 }; //common default values, inherit into Pnn struct PIN_DEFAULTS{ static constexpr PULL DEFAULT_PULL {PULLOFF}; static constexpr MODE DEFAULT_MODE {ANALOG}; static constexpr OSPEED DEFAULT_OSPEED {SPEEDLOW}; static constexpr bool LOWISON {false}; }; //add all pins here struct PA0 : public PIN_DEFAULTS { static constexpr GPION PORT {GPIOA}; static constexpr unsigned BASE {GPION_ADDR::BASE+GPION_ADDR::SPACING*PORT}; static constexpr unsigned PIN {0}; enum ALTFUNC : unsigned { SPI2_SCK = 0, UART2_CTS, TIM2_CH1_ETR, LPTIM1_OUT = 5 }; }; struct PA0L : public PA0 { static constexpr bool LOWISON {true}; }; struct PA1 : public PIN_DEFAULTS { static constexpr GPION PORT {GPIOA}; static constexpr unsigned BASE {GPION_ADDR::BASE+GPION_ADDR::SPACING*PORT}; static constexpr unsigned PIN {1}; enum ALTFUNC : unsigned { SPI1_SCK, UART2_RTS, TIM2_CH2, I2C1_SMBA = 6, EVENTOUT }; }; struct PA1L : public PA1 { static constexpr bool LOWISON {true}; }; //PC6 = led on nucleo-32 board struct PC6 : public PIN_DEFAULTS { static constexpr GPION PORT {GPIOC}; static constexpr unsigned BASE {GPION_ADDR::BASE+GPION_ADDR::SPACING*PORT}; static constexpr unsigned PIN {6}; enum ALTFUNC : unsigned { TIM3_CH1 = 1, TIM2_CH3 }; }; struct PC6L : public PC6 { static constexpr bool LOWISON {true}; }; //more needed }; //================================================================================= //Rcc.hpp //================================================================================= // Rcc - reset & clock control // mimimal for Gpio use //================================================================================= struct Rcc : private Reg { enum : unsigned { RCC_BASE = 0x40021000, RCC_IOPENR = RCC_BASE+0x34, //gpio clock enable RCC_IOPSMENR = RCC_BASE+0x44 //sleep mode enable }; static constexpr void gpioClockEn (PINS::GPION port, bool tf = true) { setBit<RCC_IOPENR>( 1<<port, tf ); } template<typename Pin_> static constexpr void gpioSleepEn (PINS::GPION port, bool tf = true) { setBit<RCC_IOPSMENR>( 1<<port, tf ); } }; //================================================================================= //================================================================================= // Gpio //================================================================================= template<typename Pin_> //Pin_ is PA0, PA1, ... class Gpio : private Reg, public Pin_ { //bring in ALTFUNC enum type for AltFunc using altFuncT = typename Pin_::ALTFUNC; //make functions more readable, no cost static constexpr unsigned PIN_ { Pin_::PIN }; //pin 0-15 static constexpr unsigned PINMASK_ { 1<<PIN_ }; //bitmask of pin static constexpr unsigned PIN2BIT_ { PIN_*2 }; //registers with 2bit values static constexpr unsigned PINMASK2BIT_ { 3<<PIN2BIT_ }; //mask of the 2 bit value static constexpr bool LOWISON_ { Pin_::LOWISON }; //gpio registers enum : unsigned { BASE = Pin_::BASE, MODER = BASE, OTYPER = BASE+0x4, OSPEEDR = BASE+0x8, PUPDR = BASE+0xC, IDR = BASE+0x10, ODR = BASE+0x14, BSRR = BASE+0x18, LCKR = BASE+0x1C, AFRL = BASE+0x20, AFRH = BASE+0x24, BRR = BASE+0x28, }; //optional pin properties //called from constructor //default empty (no template parameters in constructor) //silently does nothing static void Gpio_ () { } static void Gpio_ (PINS::PULL e) { pull(e); } static void Gpio_ (PINS::OTYPE e) { if( e == PINS::ODRAIN ) openDrain(); else pushPull(); } static void Gpio_ (PINS::OSPEED e) { outSpeed(e); } static void Gpio_ (PINS::MODE e) { mode(e); } //2 or more parameters //do first one, pass the rest back to this function //when only one left, calls function directly template<typename T1, typename T2, typename ...Tn> void Gpio_ (T1 t1, T2 t2, Tn... tn) { Gpio_(t1); Gpio_(t2, tn...); //either back to this function if ts, or direct call to function } public: //if OUTPUT type not specified, it will not be set and //will use or whatever the pin mode is currently set to, //which will be ANALOG out of reset // Gpio<PC6L> led(OUTPUT); // Gpio<PA0L> sw(INPUT, PULLUP); // Gpio<PA0> analog1; // if deinit wanted, just call manually if ever needed // led.deinit(); //now can reuse pin // or if you already know the state, you can just // set needed parameters when reusing pin template<typename... Ts> Gpio (Ts... ts) { Rcc::gpioClockEn( Pin_::PORT ); asm( "nop" ); //2 clocks to sync asm( "nop" ); //so no reg writes just yet off(); Gpio_(ts...); } static void deinit () { low(); //reset alt func, but do not set pin to use altFunc( (altFuncT)0, false); mode( Pin_::DEFAULT_MODE ); pull( Pin_::DEFAULT_PULL ); outSpeed( Pin_::DEFAULT_OSPEED ); pushPull(); } //set static void high () { regWr<BSRR>( PINMASK_ ); } static void low () { regWr<BRR>( PINMASK_ ); } static void on () { if(LOWISON_) low(); else high(); } static void on (bool tf) { if(tf) on(); else off(); } static void off () { if(LOWISON_) high(); else low(); } static void toggle () { togBit<ODR>( PINMASK_ ); } //get static bool isOn () { return pinVal() != LOWISON_; } static bool isOff () { return not isOn(); } static bool isHigh () { return pinVal() == 1; } static bool isLow () { return not isHigh(); } static bool pinVal () { return anyBit<IDR>( PINMASK_ ); } static bool latVal () { return anyBit<ODR>( PINMASK_ ); } //set properties static void mode (PINS::MODE e) { setMask<MODER>( PINMASK2BIT_, e<<PIN2BIT_ ); } static void pushPull () { clrBit<OTYPER>( PINMASK_ ); } static void openDrain () { setBit<OTYPER>( PINMASK_ ); } static void outSpeed (PINS::OSPEED e) { setMask<OSPEEDR>( PINMASK2BIT_, e<<PIN2BIT_ ); } static void pull (PINS::PULL e) { clrBit<PUPDR>( PINMASK2BIT_ ); if( e ) setBit<PUPDR>( e<<PIN2BIT_ ); } //enable sleep mode for the port static void sleepEnable () { Rcc::gpioSleepEn( Pin_::PORT ); } //alt functions - argument restricted to altFuncT (different for each pin) static void altFunc (altFuncT v, bool setmode = true) { static constexpr unsigned AFRREG_ { AFRL+(PIN_/8) }; //register static constexpr unsigned AFRPIN4BIT_{ (PIN_%8)<<2 };//pin bit position, 0,4,8,... clrBit<AFRREG_>( 15<<AFRPIN4BIT_ ); setBit<AFRREG_>( v<<AFRPIN4BIT_ ); //function is set, now can switch to it if wanted (default) if( setmode ) mode( PINS::ALTERNATE ); } }; //================================================================================= //delay of some unkown time static void pause(uint32_t n = 65536){ for(volatile int i = 0; i < n; i++); } //a function that takes a gpio pin, blinks n times template<typename T> static void blink(T pin, uint8_t n, uint32_t t = 65536){ for(int nn = n*2; nn--;){ pin.toggle(); pause(t); } } int main(){ using namespace PINS; Gpio<PA0L> led(PULLUP, OUTPUT, SPEEDHI); for(;;){ led.on(); //pause(65536*100); led.off(); //pause(65536*100); } // for(;;){ // // blink( led, 20 ); // // pause(65536*100); // } }
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