Compiler Explorer

Source code

#include <cstdint>
#include <type_traits>
#include <limits>

// SPDX-License-Identifier: MPL-2.0

struct DMAInterface;
struct DMASInterface;
struct DMASMInterface;

#ifndef common_svd2cpp_h
#define common_svd2cpp_h

#include <cstdint>
#include <type_traits>
#include <limits>

template <typename Treg, typename Tval, unsigned int _Offset, unsigned int _Width>
struct BaseField {
    // Define some useful field attributes
    using reg_type = typename std::remove_reference_t<Treg>::reg_type;
    static auto const reg_bits = std::numeric_limits<reg_type>::digits;

// Define mask for this field
    static_assert(_Width > 0, "Width must be non-zero");
    static_assert((_Offset + _Width) <= reg_bits, "Offset + Width must not exceed reg_type value size");
    static reg_type const constexpr Offset = _Offset;
    static reg_type const constexpr Width = _Width;
    static reg_type const constexpr Mask = (((Offset + Width) == reg_bits) ? 0 : (reg_type(1) << (Offset + Width))) - (1U << Offset);

// Create accessors for underlying data of this field
    Treg& reg_;
    Tval& val_;

BaseField(Treg& reg__, Tval& val__) : reg_(reg__), val_(val__) {}

protected:
    // Modify functions are internal, exposed with different signature by either VolatileField or StableField
    template <typename Targ, class = typename std::enable_if<std::is_integral<Targ>::value>::type>
    void mod_internal(Targ val_set, typename std::enable_if_t<std::is_integral_v<Targ>>* = 0) {
        if (__builtin_constant_p(val_set)) {
            // Constant input, write value to fold to immediate instruction
            val_ = (val_ & ~Mask) | ((val_set << Offset) & Mask);
            return;
        }
        // Force use BFI instruction
#if defined(__ARM_ARCH_ISA_A64) && __ARM_ARCH_ISA_A64
        if (reg_bits > 32) {
            asm (
            // More than 32 bits, use X type register
                "bfi     %x[res], %x[set], %[off], %[len]"
                : [res]"=r" (val_)
                :       "r" (val_),
                  [set] "r" (val_set), [off]"i" (Offset), [len]"i" (Width)
            );
        } else
#endif
        {
            asm (
#if defined(__ARM_ARCH_ISA_A64) && __ARM_ARCH_ISA_A64
            // Use W type register on 64-bit systems
                "bfi     %w[res], %w[set], %[off], %[len]"
#else
            // Use any register on 32-bit systems
                "bfi     %[res], %[set], %[off], %[len]"
#endif
                : [res]"=r" (val_)
                :       "r" (val_),
                  [set] "r" (val_set), [off]"i" (Offset), [len]"i" (Width)
            );
        }
    }

void set_internal() {
        val_ |= Mask;
    }
    void clr_internal() {
        val_ &= ~Mask;
    }

public:
    // Read access functions for this field
    template <typename Tauto>
    operator Tauto() const {
        static_assert((not std::is_same_v<Tauto, bool>) || (Width == 1), "Boolean return value is only valid for single bit fields");
        static_assert((std::numeric_limits<Tauto>::digits == 0U) // Temporary values are always valid
                          || std::numeric_limits<Tauto>::digits >= Width, "Destination type too small, use an explicit cast to discard additional bits");
        return Tauto((val_ & Mask) >> Offset);
    }
    auto get() const {
        if constexpr (Width == 1) {
            // For auto values of width 1, automatically convert to boolean
            return static_cast<bool>(this->operator reg_type());
        } else {
            // For other widths, use the register type
            return this->operator reg_type();
        }
    }
};

// Specialization of BaseField with RMW (volatile) access
template <typename Treg, unsigned int Offset, unsigned int Width>
struct VolatileField : public BaseField<Treg, volatile typename std::remove_reference_t<Treg>::reg_type, Offset, Width> {
    using Base = BaseField<Treg, volatile typename std::remove_reference_t<Treg>::reg_type, Offset, Width>;

VolatileField(Treg& reg__, volatile typename std::remove_reference_t<Treg>::reg_type& val__) : Base(reg__, val__) {}

// Expose as RMW, since access is volatile, it implicitly performs a read and write
    template <typename Targ, class = typename std::enable_if<std::is_integral<Targ>::value>::type>
    void rmw(Targ val_set, typename std::enable_if_t<std::is_integral_v<Targ>>* = 0) {
        Base::mod_internal(val_set);
    }
    template <typename Targ>
    void rmw(Targ val_set, typename std::enable_if_t<!std::is_integral_v<Targ> && std::is_enum_v<Targ>>* = 0) {
        rmw(static_cast<std::underlying_type_t<Targ>>(val_set));
    }

// Do not return reg_, call chaining is ill-advised
    void set() {
        Base::set_internal();
    }
    void clr() {
        Base::clr_internal();
    }
};

// Specialization of BaseField with modify-only (non-volatile) access
template <typename Treg, unsigned int Offset, unsigned int Width>
struct StableField : public BaseField<Treg, typename std::remove_reference_t<Treg>::reg_type, Offset, Width> {
    using Base = BaseField<Treg, typename std::remove_reference_t<Treg>::reg_type, Offset, Width>;

StableField(Treg& reg__, typename std::remove_reference_t<Treg>::reg_type& val__) : Base(reg__, val__) {}
    
    // Expose as modify-only, no implicit read or write is performed
    template <typename Targ>
    auto& mod(Targ val_set, typename std::enable_if_t<std::is_integral_v<Targ>>* = 0) {
        Base::mod_internal(val_set);
        return Base::reg_;
    }
    template <typename Targ>
    auto& mod(Targ val_set, typename std::enable_if_t<!std::is_integral_v<Targ> && std::is_enum_v<Targ>>* = 0) {
        return mod(static_cast<std::underlying_type_t<Targ>>(val_set));
    }

// Stable call chaining is desired, return reg_
    auto& set() {
        Base::set_internal();
        return Base::reg_;
    }
    auto& clr() {
        Base::clr_internal();
        return Base::reg_;
    }
};

// Specialization of BaseField with const access
template <typename Treg, unsigned int Offset, unsigned int Width>
struct ConstField : public BaseField<Treg, typename std::remove_reference_t<Treg>::reg_type const, Offset, Width> {
    using Base = BaseField<Treg, typename std::remove_reference_t<Treg>::reg_type const, Offset, Width>;

ConstField(Treg& reg__, typename std::remove_reference_t<Treg>::reg_type const& val__) : Base(reg__, val__) {}

// const, so no modify functions accessible
};

template <typename Tval, Tval reset_value, typename Reg>
struct Register {
    using reg_type = Tval;
    static auto const reg_bits = std::numeric_limits<reg_type>::digits;
    volatile Tval val_vol;
    
    auto read() {
        return typename Reg::StableAccess{ val_vol, val_vol };
    }
    auto init(Tval val_init = reset_value) {
        return typename Reg::StableAccess{ val_vol, val_init };
    }
    void write(Tval val_write) {
        val_vol = val_write;
    }
    void clear() {
        val_vol = 0;
    }

void set(reg_type mask) {
        val_vol |= mask;
    }
    void clr(reg_type mask) {
        val_vol &= ~mask;
    }

template <typename Targ, class = typename std::enable_if<std::is_integral<Targ>::value>::type>
    void rmw(reg_type offset, reg_type mask, Targ val_set, typename std::enable_if_t<std::is_integral_v<Targ>>* = 0) {
        rmw_internal(offset, mask, val_set);
    }
    template <typename Targ>
    void rmw(reg_type offset, reg_type mask, Targ val_set, typename std::enable_if_t<!std::is_integral_v<Targ> && std::is_enum_v<Targ>>* = 0) {
        rmw(offset, mask, static_cast<std::underlying_type_t<Targ>>(val_set));
    }

protected:
    void rmw_internal(reg_type offset, reg_type mask, reg_type val_set) {
        // Width and offset are not constant, unable to use BFI here
        val_vol = (val_vol & ~mask) | ((val_set << offset) & mask);
    }

private:
    // Delete unwanted operators
    Register(Register const&) = delete;
    Register& operator=(Register const&) = delete;
};

template <typename Tval>
struct StableAccessBase {
    using reg_type = Tval;
    volatile Tval& val_vol;
    Tval val_copy;

StableAccessBase(volatile Tval& val_vol__, Tval val_copy__) : val_vol(val_vol__), val_copy(val_copy__) {}

operator Tval() const {
        return val_copy;
    }
    void write() {
        val_vol = val_copy;
    }
    void clear() {
        val_copy = 0;
    }

void set(reg_type mask) {
        val_copy |= mask;
    }
    void clr(reg_type mask) {
        val_copy &= ~mask;
    }

template <typename Targ, class = typename std::enable_if<std::is_integral<Targ>::value>::type>
    auto& mod(reg_type offset, reg_type mask, Targ val_set, typename std::enable_if_t<std::is_integral_v<Targ>>* = 0) {
        return mod_internal(offset, mask, val_set);
    }
    template <typename Targ>
    auto& mod(reg_type offset, reg_type mask, Targ val_set, typename std::enable_if_t<!std::is_integral_v<Targ> && std::is_enum_v<Targ>>* = 0) {
        return mod(offset, mask, static_cast<std::underlying_type_t<Targ>>(val_set));
    }

protected:
    auto& mod_internal(reg_type offset, reg_type mask, reg_type val_set) {
        // Width and offset are not constant, unable to use BFI here
        val_vol = (val_vol & ~mask) | ((val_set << offset) & mask);
        return *this;
    }

private:
    // Delete unwanted operators
    StableAccessBase(StableAccessBase const&) = delete;
    StableAccessBase& operator=(StableAccessBase const&) = delete;
};

#endif // common_svd2cpp_h

// Cluster DMA.S[%s].M[%s] generated by svd2cpp, array index by ['0', '1']
struct DMASMInterface {
    // stream x memory [0|1] address register
    struct ARReg : public Register<std::uint32_t, 0x00000000, ARReg> {
        using M0AField = VolatileField<ARReg, 0, 32>;
        // Memory 0 address
        auto M0A() { return M0AField{ *this, val_vol }; }

enum Index {
        _0,
        _1,
    };
};

// Cluster DMA.S[%s] generated by svd2cpp, array index by ['0', '1', '2', '3', '4', '5', '6', '7']
struct DMASInterface {
    // stream x configuration register
    struct CRReg : public Register<std::uint32_t, 0x00000000, CRReg> {
        using ENField = VolatileField<CRReg, 0, 1>;
        // Stream enable / flag stream ready when read low
        auto EN() { return ENField{ *this, val_vol }; }
        using DMEIEField = VolatileField<CRReg, 1, 1>;
        // Direct mode error interrupt enable
        auto DMEIE() { return DMEIEField{ *this, val_vol }; }
        using TEIEField = VolatileField<CRReg, 2, 1>;
        // Transfer error interrupt enable
        auto TEIE() { return TEIEField{ *this, val_vol }; }
        using HTIEField = VolatileField<CRReg, 3, 1>;
        // Half transfer interrupt enable
        auto HTIE() { return HTIEField{ *this, val_vol }; }
        using TCIEField = VolatileField<CRReg, 4, 1>;
        // Transfer complete interrupt enable
        auto TCIE() { return TCIEField{ *this, val_vol }; }
        using PFCTRLField = VolatileField<CRReg, 5, 1>;
        // Peripheral flow controller
        auto PFCTRL() { return PFCTRLField{ *this, val_vol }; }
        using DIRField = VolatileField<CRReg, 6, 2>;
        // Data transfer direction
        auto DIR() { return DIRField{ *this, val_vol }; }
        using CIRCField = VolatileField<CRReg, 8, 1>;
        // Circular mode
        auto CIRC() { return CIRCField{ *this, val_vol }; }
        using PINCField = VolatileField<CRReg, 9, 1>;
        // Peripheral increment mode
        auto PINC() { return PINCField{ *this, val_vol }; }
        using MINCField = VolatileField<CRReg, 10, 1>;
        // Memory increment mode
        auto MINC() { return MINCField{ *this, val_vol }; }
        using PSIZEField = VolatileField<CRReg, 11, 2>;
        // Peripheral data size
        auto PSIZE() { return PSIZEField{ *this, val_vol }; }
        using MSIZEField = VolatileField<CRReg, 13, 2>;
        // Memory data size
        auto MSIZE() { return MSIZEField{ *this, val_vol }; }
        using PINCOSField = VolatileField<CRReg, 15, 1>;
        // Peripheral increment offset size
        auto PINCOS() { return PINCOSField{ *this, val_vol }; }
        using PLField = VolatileField<CRReg, 16, 2>;
        // Priority level
        auto PL() { return PLField{ *this, val_vol }; }
        using DBMField = VolatileField<CRReg, 18, 1>;
        // Double buffer mode
        auto DBM() { return DBMField{ *this, val_vol }; }
        using CTField = VolatileField<CRReg, 19, 1>;
        // Current target (only in double buffer mode)
        auto CT() { return CTField{ *this, val_vol }; }
        using ACKField = VolatileField<CRReg, 20, 1>;
        // ACK
        auto ACK() { return ACKField{ *this, val_vol }; }
        using PBURSTField = VolatileField<CRReg, 21, 2>;
        // Peripheral burst transfer configuration
        auto PBURST() { return PBURSTField{ *this, val_vol }; }
        using MBURSTField = VolatileField<CRReg, 23, 2>;
        // Memory burst transfer configuration
        auto MBURST() { return MBURSTField{ *this, val_vol }; }

enum Index {
        _0,
        _1,
        _2,
        _3,
        _4,
        _5,
        _6,
        _7,
    };
};

// DMA controller
struct DMAInterface {
    // low interrupt status register
    struct LISRReg : public Register<std::uint32_t, 0x00000000, LISRReg> {
        using FEIF0Field = VolatileField<LISRReg, 0, 1>;
        // Stream x FIFO error interrupt flag (x=3..0)
        auto FEIF0() { return FEIF0Field{ *this, val_vol }; }
        using DMEIF0Field = VolatileField<LISRReg, 2, 1>;
        // Stream x direct mode error interrupt flag (x=3..0)
        auto DMEIF0() { return DMEIF0Field{ *this, val_vol }; }
        using TEIF0Field = VolatileField<LISRReg, 3, 1>;
        // Stream x transfer error interrupt flag (x=3..0)
        auto TEIF0() { return TEIF0Field{ *this, val_vol }; }
        using HTIF0Field = VolatileField<LISRReg, 4, 1>;
        // Stream x half transfer interrupt flag (x=3..0)
        auto HTIF0() { return HTIF0Field{ *this, val_vol }; }
        using TCIF0Field = VolatileField<LISRReg, 5, 1>;
        // Stream x transfer complete interrupt flag (x = 3..0)
        auto TCIF0() { return TCIF0Field{ *this, val_vol }; }
        using FEIF1Field = VolatileField<LISRReg, 6, 1>;
        // Stream x FIFO error interrupt flag (x=3..0)
        auto FEIF1() { return FEIF1Field{ *this, val_vol }; }
        using DMEIF1Field = VolatileField<LISRReg, 8, 1>;
        // Stream x direct mode error interrupt flag (x=3..0)
        auto DMEIF1() { return DMEIF1Field{ *this, val_vol }; }
        using TEIF1Field = VolatileField<LISRReg, 9, 1>;
        // Stream x transfer error interrupt flag (x=3..0)
        auto TEIF1() { return TEIF1Field{ *this, val_vol }; }
        using HTIF1Field = VolatileField<LISRReg, 10, 1>;
        // Stream x half transfer interrupt flag (x=3..0)
        auto HTIF1() { return HTIF1Field{ *this, val_vol }; }
        using TCIF1Field = VolatileField<LISRReg, 11, 1>;
        // Stream x transfer complete interrupt flag (x = 3..0)
        auto TCIF1() { return TCIF1Field{ *this, val_vol }; }
        using FEIF2Field = VolatileField<LISRReg, 16, 1>;
        // Stream x FIFO error interrupt flag (x=3..0)
        auto FEIF2() { return FEIF2Field{ *this, val_vol }; }
        using DMEIF2Field = VolatileField<LISRReg, 18, 1>;
        // Stream x direct mode error interrupt flag (x=3..0)
        auto DMEIF2() { return DMEIF2Field{ *this, val_vol }; }
        using TEIF2Field = VolatileField<LISRReg, 19, 1>;
        // Stream x transfer error interrupt flag (x=3..0)
        auto TEIF2() { return TEIF2Field{ *this, val_vol }; }
        using HTIF2Field = VolatileField<LISRReg, 20, 1>;
        // Stream x half transfer interrupt flag (x=3..0)
        auto HTIF2() { return HTIF2Field{ *this, val_vol }; }
        using TCIF2Field = VolatileField<LISRReg, 21, 1>;
        // Stream x transfer complete interrupt flag (x = 3..0)
        auto TCIF2() { return TCIF2Field{ *this, val_vol }; }
        using FEIF3Field = VolatileField<LISRReg, 22, 1>;
        // Stream x FIFO error interrupt flag (x=3..0)
        auto FEIF3() { return FEIF3Field{ *this, val_vol }; }
        using DMEIF3Field = VolatileField<LISRReg, 24, 1>;
        // Stream x direct mode error interrupt flag (x=3..0)
        auto DMEIF3() { return DMEIF3Field{ *this, val_vol }; }
        using TEIF3Field = VolatileField<LISRReg, 25, 1>;
        // Stream x transfer error interrupt flag (x=3..0)
        auto TEIF3() { return TEIF3Field{ *this, val_vol }; }
        using HTIF3Field = VolatileField<LISRReg, 26, 1>;
        // Stream x half transfer interrupt flag (x=3..0)
        auto HTIF3() { return HTIF3Field{ *this, val_vol }; }
        using TCIF3Field = VolatileField<LISRReg, 27, 1>;
        // Stream x transfer complete interrupt flag (x = 3..0)
        auto TCIF3() { return TCIF3Field{ *this, val_vol }; }

struct StableAccess : public StableAccessBase<reg_type> {
            StableAccess(volatile reg_type& val_vol__, reg_type val_copy__) : StableAccessBase<reg_type>(val_vol__, val_copy__) {}
            auto FEIF0() { return StableField<decltype(*this), 0, 1>{ *this, val_copy }; }
            auto FEIF0() const { return ConstField<decltype(*this), 0, 1>{ *this, val_copy }; }
            // Stream x FIFO error interrupt flag (x=3..0)
            template <typename Targ> auto& FEIF0(Targ val) { return FEIF0().mod(val); }
            auto DMEIF0() { return StableField<decltype(*this), 2, 1>{ *this, val_copy }; }
            auto DMEIF0() const { return ConstField<decltype(*this), 2, 1>{ *this, val_copy }; }
            // Stream x direct mode error interrupt flag (x=3..0)
            template <typename Targ> auto& DMEIF0(Targ val) { return DMEIF0().mod(val); }
            auto TEIF0() { return StableField<decltype(*this), 3, 1>{ *this, val_copy }; }
            auto TEIF0() const { return ConstField<decltype(*this), 3, 1>{ *this, val_copy }; }
            // Stream x transfer error interrupt flag (x=3..0)
            template <typename Targ> auto& TEIF0(Targ val) { return TEIF0().mod(val); }
            auto HTIF0() { return StableField<decltype(*this), 4, 1>{ *this, val_copy }; }
            auto HTIF0() const { return ConstField<decltype(*this), 4, 1>{ *this, val_copy }; }
            // Stream x half transfer interrupt flag (x=3..0)
            template <typename Targ> auto& HTIF0(Targ val) { return HTIF0().mod(val); }
            auto TCIF0() { return StableField<decltype(*this), 5, 1>{ *this, val_copy }; }
            auto TCIF0() const { return ConstField<decltype(*this), 5, 1>{ *this, val_copy }; }
            // Stream x transfer complete interrupt flag (x = 3..0)
            template <typename Targ> auto& TCIF0(Targ val) { return TCIF0().mod(val); }
            auto FEIF1() { return StableField<decltype(*this), 6, 1>{ *this, val_copy }; }
            auto FEIF1() const { return ConstField<decltype(*this), 6, 1>{ *this, val_copy }; }
            // Stream x FIFO error interrupt flag (x=3..0)
            template <typename Targ> auto& FEIF1(Targ val) { return FEIF1().mod(val); }
            auto DMEIF1() { return StableField<decltype(*this), 8, 1>{ *this, val_copy }; }
            auto DMEIF1() const { return ConstField<decltype(*this), 8, 1>{ *this, val_copy }; }
            // Stream x direct mode error interrupt flag (x=3..0)
            template <typename Targ> auto& DMEIF1(Targ val) { return DMEIF1().mod(val); }
            auto TEIF1() { return StableField<decltype(*this), 9, 1>{ *this, val_copy }; }
            auto TEIF1() const { return ConstField<decltype(*this), 9, 1>{ *this, val_copy }; }
            // Stream x transfer error interrupt flag (x=3..0)
            template <typename Targ> auto& TEIF1(Targ val) { return TEIF1().mod(val); }
            auto HTIF1() { return StableField<decltype(*this), 10, 1>{ *this, val_copy }; }
            auto HTIF1() const { return ConstField<decltype(*this), 10, 1>{ *this, val_copy }; }
            // Stream x half transfer interrupt flag (x=3..0)
            template <typename Targ> auto& HTIF1(Targ val) { return HTIF1().mod(val); }
            auto TCIF1() { return StableField<decltype(*this), 11, 1>{ *this, val_copy }; }
            auto TCIF1() const { return ConstField<decltype(*this), 11, 1>{ *this, val_copy }; }
            // Stream x transfer complete interrupt flag (x = 3..0)
            template <typename Targ> auto& TCIF1(Targ val) { return TCIF1().mod(val); }
            auto FEIF2() { return StableField<decltype(*this), 16, 1>{ *this, val_copy }; }
            auto FEIF2() const { return ConstField<decltype(*this), 16, 1>{ *this, val_copy }; }
            // Stream x FIFO error interrupt flag (x=3..0)
            template <typename Targ> auto& FEIF2(Targ val) { return FEIF2().mod(val); }
            auto DMEIF2() { return StableField<decltype(*this), 18, 1>{ *this, val_copy }; }
            auto DMEIF2() const { return ConstField<decltype(*this), 18, 1>{ *this, val_copy }; }
            // Stream x direct mode error interrupt flag (x=3..0)
            template <typename Targ> auto& DMEIF2(Targ val) { return DMEIF2().mod(val); }
            auto TEIF2() { return StableField<decltype(*this), 19, 1>{ *this, val_copy }; }
            auto TEIF2() const { return ConstField<decltype(*this), 19, 1>{ *this, val_copy }; }
            // Stream x transfer error interrupt flag (x=3..0)
            template <typename Targ> auto& TEIF2(Targ val) { return TEIF2().mod(val); }
            auto HTIF2() { return StableField<decltype(*this), 20, 1>{ *this, val_copy }; }
            auto HTIF2() const { return ConstField<decltype(*this), 20, 1>{ *this, val_copy }; }
            // Stream x half transfer interrupt flag (x=3..0)
            template <typename Targ> auto& HTIF2(Targ val) { return HTIF2().mod(val); }
            auto TCIF2() { return StableField<decltype(*this), 21, 1>{ *this, val_copy }; }
            auto TCIF2() const { return ConstField<decltype(*this), 21, 1>{ *this, val_copy }; }
            // Stream x transfer complete interrupt flag (x = 3..0)
            template <typename Targ> auto& TCIF2(Targ val) { return TCIF2().mod(val); }
            auto FEIF3() { return StableField<decltype(*this), 22, 1>{ *this, val_copy }; }
            auto FEIF3() const { return ConstField<decltype(*this), 22, 1>{ *this, val_copy }; }
            // Stream x FIFO error interrupt flag (x=3..0)
            template <typename Targ> auto& FEIF3(Targ val) { return FEIF3().mod(val); }
            auto DMEIF3() { return StableField<decltype(*this), 24, 1>{ *this, val_copy }; }
            auto DMEIF3() const { return ConstField<decltype(*this), 24, 1>{ *this, val_copy }; }
            // Stream x direct mode error interrupt flag (x=3..0)
            template <typename Targ> auto& DMEIF3(Targ val) { return DMEIF3().mod(val); }
            auto TEIF3() { return StableField<decltype(*this), 25, 1>{ *this, val_copy }; }
            auto TEIF3() const { return ConstField<decltype(*this), 25, 1>{ *this, val_copy }; }
            // Stream x transfer error interrupt flag (x=3..0)
            template <typename Targ> auto& TEIF3(Targ val) { return TEIF3().mod(val); }
            auto HTIF3() { return StableField<decltype(*this), 26, 1>{ *this, val_copy }; }
            auto HTIF3() const { return ConstField<decltype(*this), 26, 1>{ *this, val_copy }; }
            // Stream x half transfer interrupt flag (x=3..0)
            template <typename Targ> auto& HTIF3(Targ val) { return HTIF3().mod(val); }
            auto TCIF3() { return StableField<decltype(*this), 27, 1>{ *this, val_copy }; }
            auto TCIF3() const { return ConstField<decltype(*this), 27, 1>{ *this, val_copy }; }
            // Stream x transfer complete interrupt flag (x = 3..0)
            template <typename Targ> auto& TCIF3(Targ val) { return TCIF3().mod(val); }
        };
    } LISR;
    // high interrupt status register
    struct HISRReg : public Register<std::uint32_t, 0x00000000, HISRReg> {
        using FEIF4Field = VolatileField<HISRReg, 0, 1>;
        // Stream x FIFO error interrupt flag (x=7..4)
        auto FEIF4() { return FEIF4Field{ *this, val_vol }; }
        using DMEIF4Field = VolatileField<HISRReg, 2, 1>;
        // Stream x direct mode error interrupt flag (x=7..4)
        auto DMEIF4() { return DMEIF4Field{ *this, val_vol }; }
        using TEIF4Field = VolatileField<HISRReg, 3, 1>;
        // Stream x transfer error interrupt flag (x=7..4)
        auto TEIF4() { return TEIF4Field{ *this, val_vol }; }
        using HTIF4Field = VolatileField<HISRReg, 4, 1>;
        // Stream x half transfer interrupt flag (x=7..4)
        auto HTIF4() { return HTIF4Field{ *this, val_vol }; }
        using TCIF4Field = VolatileField<HISRReg, 5, 1>;
        // Stream x transfer complete interrupt flag (x=7..4)
        auto TCIF4() { return TCIF4Field{ *this, val_vol }; }
        using FEIF5Field = VolatileField<HISRReg, 6, 1>;
        // Stream x FIFO error interrupt flag (x=7..4)
        auto FEIF5() { return FEIF5Field{ *this, val_vol }; }
        using DMEIF5Field = VolatileField<HISRReg, 8, 1>;
        // Stream x direct mode error interrupt flag (x=7..4)
        auto DMEIF5() { return DMEIF5Field{ *this, val_vol }; }
        using TEIF5Field = VolatileField<HISRReg, 9, 1>;
        // Stream x transfer error interrupt flag (x=7..4)
        auto TEIF5() { return TEIF5Field{ *this, val_vol }; }
        using HTIF5Field = VolatileField<HISRReg, 10, 1>;
        // Stream x half transfer interrupt flag (x=7..4)
        auto HTIF5() { return HTIF5Field{ *this, val_vol }; }
        using TCIF5Field = VolatileField<HISRReg, 11, 1>;
        // Stream x transfer complete interrupt flag (x=7..4)
        auto TCIF5() { return TCIF5Field{ *this, val_vol }; }
        using FEIF6Field = VolatileField<HISRReg, 16, 1>;
        // Stream x FIFO error interrupt flag (x=7..4)
        auto FEIF6() { return FEIF6Field{ *this, val_vol }; }
        using DMEIF6Field = VolatileField<HISRReg, 18, 1>;
        // Stream x direct mode error interrupt flag (x=7..4)
        auto DMEIF6() { return DMEIF6Field{ *this, val_vol }; }
        using TEIF6Field = VolatileField<HISRReg, 19, 1>;
        // Stream x transfer error interrupt flag (x=7..4)
        auto TEIF6() { return TEIF6Field{ *this, val_vol }; }
        using HTIF6Field = VolatileField<HISRReg, 20, 1>;
        // Stream x half transfer interrupt flag (x=7..4)
        auto HTIF6() { return HTIF6Field{ *this, val_vol }; }
        using TCIF6Field = VolatileField<HISRReg, 21, 1>;
        // Stream x transfer complete interrupt flag (x=7..4)
        auto TCIF6() { return TCIF6Field{ *this, val_vol }; }
        using FEIF7Field = VolatileField<HISRReg, 22, 1>;
        // Stream x FIFO error interrupt flag (x=7..4)
        auto FEIF7() { return FEIF7Field{ *this, val_vol }; }
        using DMEIF7Field = VolatileField<HISRReg, 24, 1>;
        // Stream x direct mode error interrupt flag (x=7..4)
        auto DMEIF7() { return DMEIF7Field{ *this, val_vol }; }
        using TEIF7Field = VolatileField<HISRReg, 25, 1>;
        // Stream x transfer error interrupt flag (x=7..4)
        auto TEIF7() { return TEIF7Field{ *this, val_vol }; }
        using HTIF7Field = VolatileField<HISRReg, 26, 1>;
        // Stream x half transfer interrupt flag (x=7..4)
        auto HTIF7() { return HTIF7Field{ *this, val_vol }; }
        using TCIF7Field = VolatileField<HISRReg, 27, 1>;
        // Stream x transfer complete interrupt flag (x=7..4)
        auto TCIF7() { return TCIF7Field{ *this, val_vol }; }

struct StableAccess : public StableAccessBase<reg_type> {
            StableAccess(volatile reg_type& val_vol__, reg_type val_copy__) : StableAccessBase<reg_type>(val_vol__, val_copy__) {}
            auto FEIF4() { return StableField<decltype(*this), 0, 1>{ *this, val_copy }; }
            auto FEIF4() const { return ConstField<decltype(*this), 0, 1>{ *this, val_copy }; }
            // Stream x FIFO error interrupt flag (x=7..4)
            template <typename Targ> auto& FEIF4(Targ val) { return FEIF4().mod(val); }
            auto DMEIF4() { return StableField<decltype(*this), 2, 1>{ *this, val_copy }; }
            auto DMEIF4() const { return ConstField<decltype(*this), 2, 1>{ *this, val_copy }; }
            // Stream x direct mode error interrupt flag (x=7..4)
            template <typename Targ> auto& DMEIF4(Targ val) { return DMEIF4().mod(val); }
            auto TEIF4() { return StableField<decltype(*this), 3, 1>{ *this, val_copy }; }
            auto TEIF4() const { return ConstField<decltype(*this), 3, 1>{ *this, val_copy }; }
            // Stream x transfer error interrupt flag (x=7..4)
            template <typename Targ> auto& TEIF4(Targ val) { return TEIF4().mod(val); }
            auto HTIF4() { return StableField<decltype(*this), 4, 1>{ *this, val_copy }; }
            auto HTIF4() const { return ConstField<decltype(*this), 4, 1>{ *this, val_copy }; }
            // Stream x half transfer interrupt flag (x=7..4)
            template <typename Targ> auto& HTIF4(Targ val) { return HTIF4().mod(val); }
            auto TCIF4() { return StableField<decltype(*this), 5, 1>{ *this, val_copy }; }
            auto TCIF4() const { return ConstField<decltype(*this), 5, 1>{ *this, val_copy }; }
            // Stream x transfer complete interrupt flag (x=7..4)
            template <typename Targ> auto& TCIF4(Targ val) { return TCIF4().mod(val); }
            auto FEIF5() { return StableField<decltype(*this), 6, 1>{ *this, val_copy }; }
            auto FEIF5() const { return ConstField<decltype(*this), 6, 1>{ *this, val_copy }; }
            // Stream x FIFO error interrupt flag (x=7..4)
            template <typename Targ> auto& FEIF5(Targ val) { return FEIF5().mod(val); }
            auto DMEIF5() { return StableField<decltype(*this), 8, 1>{ *this, val_copy }; }
            auto DMEIF5() const { return ConstField<decltype(*this), 8, 1>{ *this, val_copy }; }
            // Stream x direct mode error interrupt flag (x=7..4)
            template <typename Targ> auto& DMEIF5(Targ val) { return DMEIF5().mod(val); }
            auto TEIF5() { return StableField<decltype(*this), 9, 1>{ *this, val_copy }; }
            auto TEIF5() const { return ConstField<decltype(*this), 9, 1>{ *this, val_copy }; }
            // Stream x transfer error interrupt flag (x=7..4)
            template <typename Targ> auto& TEIF5(Targ val) { return TEIF5().mod(val); }
            auto HTIF5() { return StableField<decltype(*this), 10, 1>{ *this, val_copy }; }
            auto HTIF5() const { return ConstField<decltype(*this), 10, 1>{ *this, val_copy }; }
            // Stream x half transfer interrupt flag (x=7..4)
            template <typename Targ> auto& HTIF5(Targ val) { return HTIF5().mod(val); }
            auto TCIF5() { return StableField<decltype(*this), 11, 1>{ *this, val_copy }; }
            auto TCIF5() const { return ConstField<decltype(*this), 11, 1>{ *this, val_copy }; }
            // Stream x transfer complete interrupt flag (x=7..4)
            template <typename Targ> auto& TCIF5(Targ val) { return TCIF5().mod(val); }
            auto FEIF6() { return StableField<decltype(*this), 16, 1>{ *this, val_copy }; }
            auto FEIF6() const { return ConstField<decltype(*this), 16, 1>{ *this, val_copy }; }
            // Stream x FIFO error interrupt flag (x=7..4)
            template <typename Targ> auto& FEIF6(Targ val) { return FEIF6().mod(val); }
            auto DMEIF6() { return StableField<decltype(*this), 18, 1>{ *this, val_copy }; }
            auto DMEIF6() const { return ConstField<decltype(*this), 18, 1>{ *this, val_copy }; }
            // Stream x direct mode error interrupt flag (x=7..4)
            template <typename Targ> auto& DMEIF6(Targ val) { return DMEIF6().mod(val); }
            auto TEIF6() { return StableField<decltype(*this), 19, 1>{ *this, val_copy }; }
            auto TEIF6() const { return ConstField<decltype(*this), 19, 1>{ *this, val_copy }; }
            // Stream x transfer error interrupt flag (x=7..4)
            template <typename Targ> auto& TEIF6(Targ val) { return TEIF6().mod(val); }
            auto HTIF6() { return StableField<decltype(*this), 20, 1>{ *this, val_copy }; }
            auto HTIF6() const { return ConstField<decltype(*this), 20, 1>{ *this, val_copy }; }
            // Stream x half transfer interrupt flag (x=7..4)
            template <typename Targ> auto& HTIF6(Targ val) { return HTIF6().mod(val); }
            auto TCIF6() { return StableField<decltype(*this), 21, 1>{ *this, val_copy }; }
            auto TCIF6() const { return ConstField<decltype(*this), 21, 1>{ *this, val_copy }; }
            // Stream x transfer complete interrupt flag (x=7..4)
            template <typename Targ> auto& TCIF6(Targ val) { return TCIF6().mod(val); }
            auto FEIF7() { return StableField<decltype(*this), 22, 1>{ *this, val_copy }; }
            auto FEIF7() const { return ConstField<decltype(*this), 22, 1>{ *this, val_copy }; }
            // Stream x FIFO error interrupt flag (x=7..4)
            template <typename Targ> auto& FEIF7(Targ val) { return FEIF7().mod(val); }
            auto DMEIF7() { return StableField<decltype(*this), 24, 1>{ *this, val_copy }; }
            auto DMEIF7() const { return ConstField<decltype(*this), 24, 1>{ *this, val_copy }; }
            // Stream x direct mode error interrupt flag (x=7..4)
            template <typename Targ> auto& DMEIF7(Targ val) { return DMEIF7().mod(val); }
            auto TEIF7() { return StableField<decltype(*this), 25, 1>{ *this, val_copy }; }
            auto TEIF7() const { return ConstField<decltype(*this), 25, 1>{ *this, val_copy }; }
            // Stream x transfer error interrupt flag (x=7..4)
            template <typename Targ> auto& TEIF7(Targ val) { return TEIF7().mod(val); }
            auto HTIF7() { return StableField<decltype(*this), 26, 1>{ *this, val_copy }; }
            auto HTIF7() const { return ConstField<decltype(*this), 26, 1>{ *this, val_copy }; }
            // Stream x half transfer interrupt flag (x=7..4)
            template <typename Targ> auto& HTIF7(Targ val) { return HTIF7().mod(val); }
            auto TCIF7() { return StableField<decltype(*this), 27, 1>{ *this, val_copy }; }
            auto TCIF7() const { return ConstField<decltype(*this), 27, 1>{ *this, val_copy }; }
            // Stream x transfer complete interrupt flag (x=7..4)
            template <typename Targ> auto& TCIF7(Targ val) { return TCIF7().mod(val); }
        };
    } HISR;
    // low interrupt flag clear register
    struct LIFCRReg : public Register<std::uint32_t, 0x00000000, LIFCRReg> {
        using CFEIF0Field = VolatileField<LIFCRReg, 0, 1>;
        // Stream x clear FIFO error interrupt flag (x = 3..0)
        auto CFEIF0() { return CFEIF0Field{ *this, val_vol }; }
        using CDMEIF0Field = VolatileField<LIFCRReg, 2, 1>;
        // Stream x clear direct mode error interrupt flag (x = 3..0)
        auto CDMEIF0() { return CDMEIF0Field{ *this, val_vol }; }
        using CTEIF0Field = VolatileField<LIFCRReg, 3, 1>;
        // Stream x clear transfer error interrupt flag (x = 3..0)
        auto CTEIF0() { return CTEIF0Field{ *this, val_vol }; }
        using CHTIF0Field = VolatileField<LIFCRReg, 4, 1>;
        // Stream x clear half transfer interrupt flag (x = 3..0)
        auto CHTIF0() { return CHTIF0Field{ *this, val_vol }; }
        using CTCIF0Field = VolatileField<LIFCRReg, 5, 1>;
        // Stream x clear transfer complete interrupt flag (x = 3..0)
        auto CTCIF0() { return CTCIF0Field{ *this, val_vol }; }
        using CFEIF1Field = VolatileField<LIFCRReg, 6, 1>;
        // Stream x clear FIFO error interrupt flag (x = 3..0)
        auto CFEIF1() { return CFEIF1Field{ *this, val_vol }; }
        using CDMEIF1Field = VolatileField<LIFCRReg, 8, 1>;
        // Stream x clear direct mode error interrupt flag (x = 3..0)
        auto CDMEIF1() { return CDMEIF1Field{ *this, val_vol }; }
        using CTEIF1Field = VolatileField<LIFCRReg, 9, 1>;
        // Stream x clear transfer error interrupt flag (x = 3..0)
        auto CTEIF1() { return CTEIF1Field{ *this, val_vol }; }
        using CHTIF1Field = VolatileField<LIFCRReg, 10, 1>;
        // Stream x clear half transfer interrupt flag (x = 3..0)
        auto CHTIF1() { return CHTIF1Field{ *this, val_vol }; }
        using CTCIF1Field = VolatileField<LIFCRReg, 11, 1>;
        // Stream x clear transfer complete interrupt flag (x = 3..0)
        auto CTCIF1() { return CTCIF1Field{ *this, val_vol }; }
        using CFEIF2Field = VolatileField<LIFCRReg, 16, 1>;
        // Stream x clear FIFO error interrupt flag (x = 3..0)
        auto CFEIF2() { return CFEIF2Field{ *this, val_vol }; }
        using CDMEIF2Field = VolatileField<LIFCRReg, 18, 1>;
        // Stream x clear direct mode error interrupt flag (x = 3..0)
        auto CDMEIF2() { return CDMEIF2Field{ *this, val_vol }; }
        using CTEIF2Field = VolatileField<LIFCRReg, 19, 1>;
        // Stream x clear transfer error interrupt flag (x = 3..0)
        auto CTEIF2() { return CTEIF2Field{ *this, val_vol }; }
        using CHTIF2Field = VolatileField<LIFCRReg, 20, 1>;
        // Stream x clear half transfer interrupt flag (x = 3..0)
        auto CHTIF2() { return CHTIF2Field{ *this, val_vol }; }
        using CTCIF2Field = VolatileField<LIFCRReg, 21, 1>;
        // Stream x clear transfer complete interrupt flag (x = 3..0)
        auto CTCIF2() { return CTCIF2Field{ *this, val_vol }; }
        using CFEIF3Field = VolatileField<LIFCRReg, 22, 1>;
        // Stream x clear FIFO error interrupt flag (x = 3..0)
        auto CFEIF3() { return CFEIF3Field{ *this, val_vol }; }
        using CDMEIF3Field = VolatileField<LIFCRReg, 24, 1>;
        // Stream x clear direct mode error interrupt flag (x = 3..0)
        auto CDMEIF3() { return CDMEIF3Field{ *this, val_vol }; }
        using CTEIF3Field = VolatileField<LIFCRReg, 25, 1>;
        // Stream x clear transfer error interrupt flag (x = 3..0)
        auto CTEIF3() { return CTEIF3Field{ *this, val_vol }; }
        using CHTIF3Field = VolatileField<LIFCRReg, 26, 1>;
        // Stream x clear half transfer interrupt flag (x = 3..0)
        auto CHTIF3() { return CHTIF3Field{ *this, val_vol }; }
        using CTCIF3Field = VolatileField<LIFCRReg, 27, 1>;
        // Stream x clear transfer complete interrupt flag (x = 3..0)
        auto CTCIF3() { return CTCIF3Field{ *this, val_vol }; }

struct StableAccess : public StableAccessBase<reg_type> {
            StableAccess(volatile reg_type& val_vol__, reg_type val_copy__) : StableAccessBase<reg_type>(val_vol__, val_copy__) {}
            auto CFEIF0() { return StableField<decltype(*this), 0, 1>{ *this, val_copy }; }
            auto CFEIF0() const { return ConstField<decltype(*this), 0, 1>{ *this, val_copy }; }
            // Stream x clear FIFO error interrupt flag (x = 3..0)
            template <typename Targ> auto& CFEIF0(Targ val) { return CFEIF0().mod(val); }
            auto CDMEIF0() { return StableField<decltype(*this), 2, 1>{ *this, val_copy }; }
            auto CDMEIF0() const { return ConstField<decltype(*this), 2, 1>{ *this, val_copy }; }
            // Stream x clear direct mode error interrupt flag (x = 3..0)
            template <typename Targ> auto& CDMEIF0(Targ val) { return CDMEIF0().mod(val); }
            auto CTEIF0() { return StableField<decltype(*this), 3, 1>{ *this, val_copy }; }
            auto CTEIF0() const { return ConstField<decltype(*this), 3, 1>{ *this, val_copy }; }
            // Stream x clear transfer error interrupt flag (x = 3..0)
            template <typename Targ> auto& CTEIF0(Targ val) { return CTEIF0().mod(val); }
            auto CHTIF0() { return StableField<decltype(*this), 4, 1>{ *this, val_copy }; }
            auto CHTIF0() const { return ConstField<decltype(*this), 4, 1>{ *this, val_copy }; }
            // Stream x clear half transfer interrupt flag (x = 3..0)
            template <typename Targ> auto& CHTIF0(Targ val) { return CHTIF0().mod(val); }
            auto CTCIF0() { return StableField<decltype(*this), 5, 1>{ *this, val_copy }; }
            auto CTCIF0() const { return ConstField<decltype(*this), 5, 1>{ *this, val_copy }; }
            // Stream x clear transfer complete interrupt flag (x = 3..0)
            template <typename Targ> auto& CTCIF0(Targ val) { return CTCIF0().mod(val); }
            auto CFEIF1() { return StableField<decltype(*this), 6, 1>{ *this, val_copy }; }
            auto CFEIF1() const { return ConstField<decltype(*this), 6, 1>{ *this, val_copy }; }
            // Stream x clear FIFO error interrupt flag (x = 3..0)
            template <typename Targ> auto& CFEIF1(Targ val) { return CFEIF1().mod(val); }
            auto CDMEIF1() { return StableField<decltype(*this), 8, 1>{ *this, val_copy }; }
            auto CDMEIF1() const { return ConstField<decltype(*this), 8, 1>{ *this, val_copy }; }
            // Stream x clear direct mode error interrupt flag (x = 3..0)
            template <typename Targ> auto& CDMEIF1(Targ val) { return CDMEIF1().mod(val); }
            auto CTEIF1() { return StableField<decltype(*this), 9, 1>{ *this, val_copy }; }
            auto CTEIF1() const { return ConstField<decltype(*this), 9, 1>{ *this, val_copy }; }
            // Stream x clear transfer error interrupt flag (x = 3..0)
            template <typename Targ> auto& CTEIF1(Targ val) { return CTEIF1().mod(val); }
            auto CHTIF1() { return StableField<decltype(*this), 10, 1>{ *this, val_copy }; }
            auto CHTIF1() const { return ConstField<decltype(*this), 10, 1>{ *this, val_copy }; }
            // Stream x clear half transfer interrupt flag (x = 3..0)
            template <typename Targ> auto& CHTIF1(Targ val) { return CHTIF1().mod(val); }
            auto CTCIF1() { return StableField<decltype(*this), 11, 1>{ *this, val_copy }; }
            auto CTCIF1() const { return ConstField<decltype(*this), 11, 1>{ *this, val_copy }; }
            // Stream x clear transfer complete interrupt flag (x = 3..0)
            template <typename Targ> auto& CTCIF1(Targ val) { return CTCIF1().mod(val); }
            auto CFEIF2() { return StableField<decltype(*this), 16, 1>{ *this, val_copy }; }
            auto CFEIF2() const { return ConstField<decltype(*this), 16, 1>{ *this, val_copy }; }
            // Stream x clear FIFO error interrupt flag (x = 3..0)
            template <typename Targ> auto& CFEIF2(Targ val) { return CFEIF2().mod(val); }
            auto CDMEIF2() { return StableField<decltype(*this), 18, 1>{ *this, val_copy }; }
            auto CDMEIF2() const { return ConstField<decltype(*this), 18, 1>{ *this, val_copy }; }
            // Stream x clear direct mode error interrupt flag (x = 3..0)
            template <typename Targ> auto& CDMEIF2(Targ val) { return CDMEIF2().mod(val); }
            auto CTEIF2() { return StableField<decltype(*this), 19, 1>{ *this, val_copy }; }
            auto CTEIF2() const { return ConstField<decltype(*this), 19, 1>{ *this, val_copy }; }
            // Stream x clear transfer error interrupt flag (x = 3..0)
            template <typename Targ> auto& CTEIF2(Targ val) { return CTEIF2().mod(val); }
            auto CHTIF2() { return StableField<decltype(*this), 20, 1>{ *this, val_copy }; }
            auto CHTIF2() const { return ConstField<decltype(*this), 20, 1>{ *this, val_copy }; }
            // Stream x clear half transfer interrupt flag (x = 3..0)
            template <typename Targ> auto& CHTIF2(Targ val) { return CHTIF2().mod(val); }
            auto CTCIF2() { return StableField<decltype(*this), 21, 1>{ *this, val_copy }; }
            auto CTCIF2() const { return ConstField<decltype(*this), 21, 1>{ *this, val_copy }; }
            // Stream x clear transfer complete interrupt flag (x = 3..0)
            template <typename Targ> auto& CTCIF2(Targ val) { return CTCIF2().mod(val); }
            auto CFEIF3() { return StableField<decltype(*this), 22, 1>{ *this, val_copy }; }
            auto CFEIF3() const { return ConstField<decltype(*this), 22, 1>{ *this, val_copy }; }
            // Stream x clear FIFO error interrupt flag (x = 3..0)
            template <typename Targ> auto& CFEIF3(Targ val) { return CFEIF3().mod(val); }
            auto CDMEIF3() { return StableField<decltype(*this), 24, 1>{ *this, val_copy }; }
            auto CDMEIF3() const { return ConstField<decltype(*this), 24, 1>{ *this, val_copy }; }
            // Stream x clear direct mode error interrupt flag (x = 3..0)
            template <typename Targ> auto& CDMEIF3(Targ val) { return CDMEIF3().mod(val); }
            auto CTEIF3() { return StableField<decltype(*this), 25, 1>{ *this, val_copy }; }
            auto CTEIF3() const { return ConstField<decltype(*this), 25, 1>{ *this, val_copy }; }
            // Stream x clear transfer error interrupt flag (x = 3..0)
            template <typename Targ> auto& CTEIF3(Targ val) { return CTEIF3().mod(val); }
            auto CHTIF3() { return StableField<decltype(*this), 26, 1>{ *this, val_copy }; }
            auto CHTIF3() const { return ConstField<decltype(*this), 26, 1>{ *this, val_copy }; }
            // Stream x clear half transfer interrupt flag (x = 3..0)
            template <typename Targ> auto& CHTIF3(Targ val) { return CHTIF3().mod(val); }
            auto CTCIF3() { return StableField<decltype(*this), 27, 1>{ *this, val_copy }; }
            auto CTCIF3() const { return ConstField<decltype(*this), 27, 1>{ *this, val_copy }; }
            // Stream x clear transfer complete interrupt flag (x = 3..0)
            template <typename Targ> auto& CTCIF3(Targ val) { return CTCIF3().mod(val); }
        };
    } LIFCR;
    // high interrupt flag clear register
    struct HIFCRReg : public Register<std::uint32_t, 0x00000000, HIFCRReg> {
        using CFEIF4Field = VolatileField<HIFCRReg, 0, 1>;
        // Stream x clear FIFO error interrupt flag (x = 7..4)
        auto CFEIF4() { return CFEIF4Field{ *this, val_vol }; }
        using CDMEIF4Field = VolatileField<HIFCRReg, 2, 1>;
        // Stream x clear direct mode error interrupt flag (x = 7..4)
        auto CDMEIF4() { return CDMEIF4Field{ *this, val_vol }; }
        using CTEIF4Field = VolatileField<HIFCRReg, 3, 1>;
        // Stream x clear transfer error interrupt flag (x = 7..4)
        auto CTEIF4() { return CTEIF4Field{ *this, val_vol }; }
        using CHTIF4Field = VolatileField<HIFCRReg, 4, 1>;
        // Stream x clear half transfer interrupt flag (x = 7..4)
        auto CHTIF4() { return CHTIF4Field{ *this, val_vol }; }
        using CTCIF4Field = VolatileField<HIFCRReg, 5, 1>;
        // Stream x clear transfer complete interrupt flag (x = 7..4)
        auto CTCIF4() { return CTCIF4Field{ *this, val_vol }; }
        using CFEIF5Field = VolatileField<HIFCRReg, 6, 1>;
        // Stream x clear FIFO error interrupt flag (x = 7..4)
        auto CFEIF5() { return CFEIF5Field{ *this, val_vol }; }
        using CDMEIF5Field = VolatileField<HIFCRReg, 8, 1>;
        // Stream x clear direct mode error interrupt flag (x = 7..4)
        auto CDMEIF5() { return CDMEIF5Field{ *this, val_vol }; }
        using CTEIF5Field = VolatileField<HIFCRReg, 9, 1>;
        // Stream x clear transfer error interrupt flag (x = 7..4)
        auto CTEIF5() { return CTEIF5Field{ *this, val_vol }; }
        using CHTIF5Field = VolatileField<HIFCRReg, 10, 1>;
        // Stream x clear half transfer interrupt flag (x = 7..4)
        auto CHTIF5() { return CHTIF5Field{ *this, val_vol }; }
        using CTCIF5Field = VolatileField<HIFCRReg, 11, 1>;
        // Stream x clear transfer complete interrupt flag (x = 7..4)
        auto CTCIF5() { return CTCIF5Field{ *this, val_vol }; }
        using CFEIF6Field = VolatileField<HIFCRReg, 16, 1>;
        // Stream x clear FIFO error interrupt flag (x = 7..4)
        auto CFEIF6() { return CFEIF6Field{ *this, val_vol }; }
        using CDMEIF6Field = VolatileField<HIFCRReg, 18, 1>;
        // Stream x clear direct mode error interrupt flag (x = 7..4)
        auto CDMEIF6() { return CDMEIF6Field{ *this, val_vol }; }
        using CTEIF6Field = VolatileField<HIFCRReg, 19, 1>;
        // Stream x clear transfer error interrupt flag (x = 7..4)
        auto CTEIF6() { return CTEIF6Field{ *this, val_vol }; }
        using CHTIF6Field = VolatileField<HIFCRReg, 20, 1>;
        // Stream x clear half transfer interrupt flag (x = 7..4)
        auto CHTIF6() { return CHTIF6Field{ *this, val_vol }; }
        using CTCIF6Field = VolatileField<HIFCRReg, 21, 1>;
        // Stream x clear transfer complete interrupt flag (x = 7..4)
        auto CTCIF6() { return CTCIF6Field{ *this, val_vol }; }
        using CFEIF7Field = VolatileField<HIFCRReg, 22, 1>;
        // Stream x clear FIFO error interrupt flag (x = 7..4)
        auto CFEIF7() { return CFEIF7Field{ *this, val_vol }; }
        using CDMEIF7Field = VolatileField<HIFCRReg, 24, 1>;
        // Stream x clear direct mode error interrupt flag (x = 7..4)
        auto CDMEIF7() { return CDMEIF7Field{ *this, val_vol }; }
        using CTEIF7Field = VolatileField<HIFCRReg, 25, 1>;
        // Stream x clear transfer error interrupt flag (x = 7..4)
        auto CTEIF7() { return CTEIF7Field{ *this, val_vol }; }
        using CHTIF7Field = VolatileField<HIFCRReg, 26, 1>;
        // Stream x clear half transfer interrupt flag (x = 7..4)
        auto CHTIF7() { return CHTIF7Field{ *this, val_vol }; }
        using CTCIF7Field = VolatileField<HIFCRReg, 27, 1>;
        // Stream x clear transfer complete interrupt flag (x = 7..4)
        auto CTCIF7() { return CTCIF7Field{ *this, val_vol }; }

////////////////////////////////////////
// Example access of field arrays     //
////////////////////////////////////////
struct FieldElement {
    std::uint32_t Offset;
    std::uint32_t Mask;
};

FieldElement eles[] = {
    { DMAInterface::LISRReg::FEIF0Field::Offset, DMAInterface::LISRReg::FEIF0Field::Mask },
    { DMAInterface::LISRReg::FEIF1Field::Offset, DMAInterface::LISRReg::FEIF1Field::Mask },
    { DMAInterface::LISRReg::FEIF2Field::Offset, DMAInterface::LISRReg::FEIF2Field::Mask },
    { DMAInterface::LISRReg::FEIF3Field::Offset, DMAInterface::LISRReg::FEIF3Field::Mask },
};

void dma_array_example(DMAInterface& dma, std::uint32_t index) {

// Access the DMA FIFO error interrupt based on the array index
    dma.LISR.rmw(eles[index].Offset, eles[index].Mask, true);
    // Or, read it first, to access multiple fields in one go
    dma.LISR.read()
        .mod(eles[0].Offset, eles[0].Mask, true)
        .mod(eles[1].Offset, eles[1].Mask, false)
        .write();
}