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#include <stdint.h>
#include <stddef.h> 
#ifndef __BL702_MEMORYMAP_H
#define __BL702_MEMORYMAP_H

/****************************************************************************
 * Included Files
 ****************************************************************************/

/****************************************************************************
 * Pre-processor Definitions
 ****************************************************************************/
#define BL602_FLASH_XIP_BASE        0x23000000
#define BL602_FLASH_XIP_END         (0x23000000 + 16 * 1024 * 1024)
#define BL602_FLASH_XIP_REMAP0_BASE 0x33000000
#define BL602_FLASH_XIP_REMAP0_END  (0x33000000 + 16 * 1024 * 1024)
#define BL602_FLASH_XIP_REMAP1_BASE 0x43000000
#define BL602_FLASH_XIP_REMAP1_END  (0x43000000 + 16 * 1024 * 1024)
#define BL602_FLASH_XIP_REMAP2_BASE 0x53000000
#define BL602_FLASH_XIP_REMAP2_END  (0x53000000 + 16 * 1024 * 1024)

#define BL602_WRAM_BASE        0x42020000
#define BL602_WRAM_END         (0x42020000 + 176 * 1024)
#define BL602_WRAM_REMAP0_BASE 0x22020000
#define BL602_WRAM_REMAP0_END  (0x22020000 + 176 * 1024)
#define BL602_WRAM_REMAP1_BASE 0x32020000
#define BL602_WRAM_REMAP1_END  (0x32020000 + 176 * 1024)
#define BL602_WRAM_REMAP2_BASE 0x52020000
#define BL602_WRAM_REMAP2_END  (0x52020000 + 176 * 1024)

#define BL602_TCM_BASE        0x22008000
#define BL602_TCM_END         (0x22008000 + (96 + 176) * 1024)
#define BL602_TCM_REMAP0_BASE 0x32008000
#define BL602_TCM_REMAP0_END  (0x32008000 + (96 + 176) * 1024)
#define BL602_TCM_REMAP1_BASE 0x42008000
#define BL602_TCM_REMAP1_END  (0x42008000 + (96 + 176) * 1024)
#define BL602_TCM_REMAP2_BASE 0x52008000
#define BL602_TCM_REMAP2_END  (0x52008000 + (96 + 176) * 1024)
/*@} end of group Memory_Map_Section */

/* BL602 peripherals base address */
#define GLB_BASE         ((uint32_t)0x40000000)
#define RF_BASE          ((uint32_t)0x40001000)
#define GPIP_BASE        ((uint32_t)0x40002000) /*!< AUX module base address */
#define SEC_DBG_BASE     ((uint32_t)0x40003000) /*!< Security Debug module base address */
#define SEC_ENG_BASE     ((uint32_t)0x40004000) /*!< Security Engine module base address */
#define TZC_SEC_BASE     ((uint32_t)0x40005000) /*!< Trustzone control security base address */
#define TZC_NSEC_BASE    ((uint32_t)0x40006000) /*!< Trustzone control none-security base address */
#define EF_DATA_BASE     ((uint32_t)0x40007000)
#define EF_CTRL_BASE     ((uint32_t)0x40007000)
#define CCI_BASE         ((uint32_t)0x40008000)
#define L1C_BASE         ((uint32_t)0x40009000) /*!< L1 cache config base address */
#define UART0_BASE       ((uint32_t)0x4000A000)
#define UART1_BASE       ((uint32_t)0x4000A100)
#define SPI_BASE         ((uint32_t)0x4000A200)
#define I2C_BASE         ((uint32_t)0x4000A300)
#define PWM_BASE         ((uint32_t)0x4000A400)
#define TIMER_BASE       ((uint32_t)0x4000A500)
#define IR_BASE          ((uint32_t)0x4000A600)
#define SF_CTRL_BASE     ((uint32_t)0x4000B000)
#define SF_CTRL_BUF_BASE ((uint32_t)0x4000B700)
#define DMA_BASE         ((uint32_t)0x4000C000)
#define SDU_BASE         ((uint32_t)0x4000D000)
#define PDS_BASE         ((uint32_t)0x4000E000) /*!< Power down sleep module base address */
#define HBN_BASE         ((uint32_t)0x4000F000) /*!< Hibernate module base address */
#define AON_BASE         ((uint32_t)0x4000F000) /*!< Always on module base address */
#define HBN_RAM_BASE     ((uint32_t)0x40010000)

#endif

#ifndef __BL602_IRQ_H
#define __BL602_IRQ_H

/****************************************************************************
 * Included Files
 ****************************************************************************/

/****************************************************************************
 * Pre-processor Definitions
 ****************************************************************************/

#define BL602_IRQ_NUM_BASE 16

#define BL602_IRQ_MSOFT          3
#define BL602_IRQ_MTIME          7
#define BL602_IRQ_MEXT           11
#define BL602_IRQ_CLIC_SOFT_PEND 12

#define BL602_IRQ_BMX_MCU_BUS_ERR      (BL602_IRQ_NUM_BASE + 0)
#define BL602_IRQ_BMX_MCU_TO           (BL602_IRQ_NUM_BASE + 1)
#define BL602_IRQ_L1C_BMX_ERR          (BL602_IRQ_NUM_BASE + 2)
#define BL602_IRQ_L1C_BMX_TO           (BL602_IRQ_NUM_BASE + 3)
#define BL602_IRQ_SEC_BMX_ERR          (BL602_IRQ_NUM_BASE + 4)
#define BL602_IRQ_RF_TOP_INT0          (BL602_IRQ_NUM_BASE + 5)
#define BL602_IRQ_RF_TOP_INT1          (BL602_IRQ_NUM_BASE + 6)
#define BL602_IRQ_SDIO                 (BL602_IRQ_NUM_BASE + 7)
#define BL602_IRQ_DMA_BMX_ERR          (BL602_IRQ_NUM_BASE + 8)
#define BL602_IRQ_SEC_GMAC             (BL602_IRQ_NUM_BASE + 9)
#define BL602_IRQ_SEC_CDET             (BL602_IRQ_NUM_BASE + 10)
#define BL602_IRQ_SEC_PKA              (BL602_IRQ_NUM_BASE + 11)
#define BL602_IRQ_SEC_TRNG             (BL602_IRQ_NUM_BASE + 12)
#define BL602_IRQ_SEC_AES              (BL602_IRQ_NUM_BASE + 13)
#define BL602_IRQ_SEC_SHA              (BL602_IRQ_NUM_BASE + 14)
#define BL602_IRQ_DMA0_ALL             (BL602_IRQ_NUM_BASE + 15)
#define BL602_IRQ_RESERVED0            (BL602_IRQ_NUM_BASE + 16)
#define BL602_IRQ_RESERVED1            (BL602_IRQ_NUM_BASE + 17)
#define BL602_IRQ_RESERVED2            (BL602_IRQ_NUM_BASE + 18)
#define BL602_IRQ_IRTX                 (BL602_IRQ_NUM_BASE + 19)
#define BL602_IRQ_IRRX                 (BL602_IRQ_NUM_BASE + 20)
#define BL602_IRQ_RESERVED3            (BL602_IRQ_NUM_BASE + 21)
#define BL602_IRQ_RESERVED4            (BL602_IRQ_NUM_BASE + 22)
#define BL602_IRQ_SF_CTRL              (BL602_IRQ_NUM_BASE + 23)
#define BL602_IRQ_RESERVED5            (BL602_IRQ_NUM_BASE + 24)
#define BL602_IRQ_GPADC_DMA            (BL602_IRQ_NUM_BASE + 25)
#define BL602_IRQ_EFUSE                (BL602_IRQ_NUM_BASE + 26)
#define BL602_IRQ_SPI0                 (BL602_IRQ_NUM_BASE + 27)
#define BL602_IRQ_RESERVED6            (BL602_IRQ_NUM_BASE + 28)
#define BL602_IRQ_UART0                (BL602_IRQ_NUM_BASE + 29)
#define BL602_IRQ_UART1                (BL602_IRQ_NUM_BASE + 30)
#define BL602_IRQ_RESERVED7            (BL602_IRQ_NUM_BASE + 31)
#define BL602_IRQ_I2C0                 (BL602_IRQ_NUM_BASE + 32)
#define BL602_IRQ_RESERVED8            (BL602_IRQ_NUM_BASE + 33)
#define BL602_IRQ_PWM                  (BL602_IRQ_NUM_BASE + 34)
#define BL602_IRQ_RESERVED9            (BL602_IRQ_NUM_BASE + 35)
#define BL602_IRQ_TIMER0               (BL602_IRQ_NUM_BASE + 36)
#define BL602_IRQ_TIMER1               (BL602_IRQ_NUM_BASE + 37)
#define BL602_IRQ_WDT                  (BL602_IRQ_NUM_BASE + 38)
#define BL602_IRQ_RESERVED10           (BL602_IRQ_NUM_BASE + 39)
#define BL602_IRQ_RESERVED11           (BL602_IRQ_NUM_BASE + 40)
#define BL602_IRQ_RESERVED12           (BL602_IRQ_NUM_BASE + 41)
#define BL602_IRQ_RESERVED13           (BL602_IRQ_NUM_BASE + 42)
#define BL602_IRQ_RESERVED14           (BL602_IRQ_NUM_BASE + 43)
#define BL602_IRQ_GPIO_INT0            (BL602_IRQ_NUM_BASE + 44)
#define BL602_IRQ_RESERVED15           (BL602_IRQ_NUM_BASE + 45)
#define BL602_IRQ_RESERVED16           (BL602_IRQ_NUM_BASE + 46)
#define BL602_IRQ_RESERVED17           (BL602_IRQ_NUM_BASE + 47)
#define BL602_IRQ_RESERVED18           (BL602_IRQ_NUM_BASE + 48)
#define BL602_IRQ_RESERVED19           (BL602_IRQ_NUM_BASE + 49)
#define BL602_IRQ_PDS_WAKEUP           (BL602_IRQ_NUM_BASE + 50)
#define BL602_IRQ_HBN_OUT0             (BL602_IRQ_NUM_BASE + 51)
#define BL602_IRQ_HBN_OUT1             (BL602_IRQ_NUM_BASE + 52)
#define BL602_IRQ_BOR                  (BL602_IRQ_NUM_BASE + 53)
#define BL602_IRQ_WIFI                 (BL602_IRQ_NUM_BASE + 54)
#define BL616_IRQ_BZ_PHY_INT           (BL602_IRQ_NUM_BASE + 55)
#define BL602_IRQ_BLE                  (BL602_IRQ_NUM_BASE + 56)
#define BL602_IRQ_MAC_INT_TIMER        (BL602_IRQ_NUM_BASE + 57)
#define BL602_IRQ_MAC_INT_MISC         (BL602_IRQ_NUM_BASE + 58)
#define BL602_IRQ_MAC_INT_RX_TRIGGER   (BL602_IRQ_NUM_BASE + 59)
#define BL602_IRQ_MAC_INT_TX_TRIGGER   (BL602_IRQ_NUM_BASE + 60)
#define BL602_IRQ_MAC_INT_GEN          (BL602_IRQ_NUM_BASE + 61)
#define BL602_IRQ_MAC_INT_PROT_TRIGGER (BL602_IRQ_NUM_BASE + 62)
#define BL602_IRQ_WIFI_IPC             (BL602_IRQ_NUM_BASE + 63)

#endif

#define BFLB_DEVICE_TYPE_ADC      0
#define BFLB_DEVICE_TYPE_DAC      1
#define BFLB_DEVICE_TYPE_AUDIOADC 2
#define BFLB_DEVICE_TYPE_AUDIODAC 3
#define BFLB_DEVICE_TYPE_GPIO     4
#define BFLB_DEVICE_TYPE_UART     5
#define BFLB_DEVICE_TYPE_SPI      6
#define BFLB_DEVICE_TYPE_I2C      7
#define BFLB_DEVICE_TYPE_DMA      8
#define BFLB_DEVICE_TYPE_I2S      9
#define BFLB_DEVICE_TYPE_IR       10
#define BFLB_DEVICE_TYPE_TIMER    11
#define BFLB_DEVICE_TYPE_PWM      12
#define BFLB_DEVICE_TYPE_CAMERA   14
#define BFLB_DEVICE_TYPE_FLASH    15
#define BFLB_DEVICE_TYPE_QSPI     16
#define BFLB_DEVICE_TYPE_SDH      17
#define BFLB_DEVICE_TYPE_SDU      18
#define BFLB_DEVICE_TYPE_ETH      19
#define BFLB_DEVICE_TYPE_RTC      20
#define BFLB_DEVICE_TYPE_CRC      21
#define BFLB_DEVICE_TYPE_RNG      22
#define BFLB_DEVICE_TYPE_MIPI     23
#define BFLB_DEVICE_TYPE_DPI      24
#define BFLB_DEVICE_TYPE_DSI      25
#define BFLB_DEVICE_TYPE_CSI      26
#define BFLB_DEVICE_TYPE_USB      27
#define BFLB_DEVICE_TYPE_AES      28
#define BFLB_DEVICE_TYPE_SHA      29
#define BFLB_DEVICE_TYPE_MD5      30
#define BFLB_DEVICE_TYPE_TRNG     31
#define BFLB_DEVICE_TYPE_PKA      32
#define BFLB_DEVICE_TYPE_CKS      33
#define BFLB_DEVICE_TYPE_MJPEG    34
#define BFLB_DEVICE_TYPE_KYS      35
#define BFLB_DEVICE_TYPE_DBI      36
#define BFLB_DEVICE_TYPE_WDT      37
#define BFLB_DEVICE_TYPE_EF_CTRL  38
#define BFLB_DEVICE_TYPE_SDIO2    39
#define BFLB_DEVICE_TYPE_SDIO3    40
#define BFLB_DEVICE_TYPE_PLFMDMA  41

struct bflb_device_s {
    const char *name;
    uint32_t reg_base;
    uint8_t irq_num;
    uint8_t idx;
    uint8_t sub_idx;
    uint8_t dev_type;
    void *user_data;
};

#define DMA_CHANNEL_OFFSET 0x100

struct bflb_device_s dev_gpio = { .name = "gpio",
      .reg_base = GLB_BASE,
      .irq_num = BL602_IRQ_GPIO_INT0,
      .idx = 0,
      .sub_idx = 0,
      .dev_type = BFLB_DEVICE_TYPE_GPIO,
      .user_data = NULL };

struct bflb_device_s dev_sdio2 = { .name = "sdio2",
      .reg_base = SDU_BASE,
      .irq_num = BL602_IRQ_SDIO,
      .idx = 0,
      .sub_idx = 0,
      .dev_type = BFLB_DEVICE_TYPE_SDIO2,
      .user_data = NULL };

#include <stdio.h>

#define bflb_device_get_by_name(name) (&dev_##name)

void main() {
    struct bflb_device_s * dev = bflb_device_get_by_name(gpio);
    uint32_t reg_base = dev->reg_base;
    printf("GPIO reg base: %08X\n", reg_base);

struct bflb_device_s * dev2 = bflb_device_get_by_name(sdio2);
    printf("SDIO base: %08X\n", dev2->reg_base);
}