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llvm source #1
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Compiler
clang (assertions trunk)
clang (trunk)
clang 10.0.0
clang 10.0.1
clang 11.0.0
clang 11.0.1
clang 12.0.0
clang 12.0.1
clang 13.0.0
clang 14.0.0
clang 15.0.0
clang 16.0.0
clang 17.0.1
clang 18.1.0
clang 19.1.0
clang 20.1.0
clang 21.1.0
clang 4.0.1
clang 5.0.0
clang 6.0.0
clang 7.0.0
clang 8.0.0
clang 9.0.0
hexagon-clang 16.0.5
llc (assertions trunk)
llc (trunk)
llc 10.0.0
llc 10.0.1
llc 11.0.0
llc 11.0.1
llc 12.0.0
llc 12.0.1
llc 13.0.0
llc 14.0.0
llc 15.0.0
llc 16.0.0
llc 17.0.1
llc 18.1.0
llc 19.1.0
llc 20.1.0
llc 21.1.0
llc 3.2
llc 3.3
llc 3.9.1
llc 4.0.0
llc 4.0.1
llc 5.0.0
llc 6.0.0
llc 7.0.0
llc 8.0.0
llc 9.0.0
opt (assertions trunk)
opt (trunk)
opt 10.0.0
opt 10.0.1
opt 11.0.0
opt 11.0.1
opt 12.0.0
opt 12.0.1
opt 13.0.0
opt 14.0.0
opt 15.0.0
opt 16.0.0
opt 17.0.1
opt 18.1.0
opt 19.1.0
opt 20.1.0
opt 21.1.0
opt 3.2
opt 3.3
opt 3.9.1
opt 4.0.0
opt 4.0.1
opt 5.0.0
opt 6.0.0
opt 7.0.0
opt 8.0.0
opt 9.0.0
Options
Source code
; ModuleID = '<stdin>' source_filename = "<stdin>" target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128" target triple = "riscv64" define i32 @dotp(ptr %a, ptr %b) #0 { entry: br i1 false, label %scalar.ph, label %vector.ph vector.ph: ; preds = %entry br label %vector.body vector.body: ; preds = %vector.body, %vector.ph %evl.based.iv = phi i64 [ 0, %vector.ph ], [ %index.evl.next, %vector.body ] %vec.phi = phi <vscale x 16 x i32> [ zeroinitializer, %vector.ph ], [ %8, %vector.body ] %avl = phi i64 [ 1024, %vector.ph ], [ %avl.next, %vector.body ] %0 = call i32 @llvm.experimental.get.vector.length.i64(i64 %avl, i32 16, i1 true) %1 = getelementptr i8, ptr %a, i64 %evl.based.iv %vp.op.load = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 %1, <vscale x 16 x i1> splat (i1 true), i32 %0) %2 = zext <vscale x 16 x i8> %vp.op.load to <vscale x 16 x i32> %3 = getelementptr i8, ptr %b, i64 %evl.based.iv %vp.op.load1 = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr align 1 %3, <vscale x 16 x i1> splat (i1 true), i32 %0) %4 = zext <vscale x 16 x i8> %vp.op.load1 to <vscale x 16 x i32> %5 = mul <vscale x 16 x i32> %4, %2 %6 = sub <vscale x 16 x i32> zeroinitializer, %5 %7 = add <vscale x 16 x i32> %vec.phi, %6 %8 = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> splat (i1 true), <vscale x 16 x i32> %7, <vscale x 16 x i32> %vec.phi, i32 %0) %9 = zext i32 %0 to i64 %index.evl.next = add nuw i64 %9, %evl.based.iv %avl.next = sub nuw i64 %avl, %9 %10 = icmp eq i64 %index.evl.next, 1024 br i1 %10, label %middle.block, label %vector.body, !llvm.loop !0 middle.block: ; preds = %vector.body %11 = call i32 @llvm.vector.reduce.add.nxv16i32(<vscale x 16 x i32> %8) br label %for.exit scalar.ph: ; preds = %entry br label %for.body for.body: ; preds = %scalar.ph, %for.body %iv = phi i64 [ 0, %scalar.ph ], [ %iv.next, %for.body ] %accum = phi i32 [ 0, %scalar.ph ], [ %add, %for.body ] %gep.a = getelementptr i8, ptr %a, i64 %iv %load.a = load i8, ptr %gep.a, align 1 %ext.a = zext i8 %load.a to i32 %gep.b = getelementptr i8, ptr %b, i64 %iv %load.b = load i8, ptr %gep.b, align 1 %ext.b = zext i8 %load.b to i32 %mul = mul i32 %ext.b, %ext.a %sub = sub i32 0, %mul %add = add i32 %accum, %sub %iv.next = add i64 %iv, 1 %exitcond.not = icmp eq i64 %iv.next, 1024 br i1 %exitcond.not, label %for.exit, label %for.body, !llvm.loop !4 for.exit: ; preds = %middle.block, %for.body %add.lcssa = phi i32 [ %add, %for.body ], [ %11, %middle.block ] ret i32 %add.lcssa } ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) declare i32 @llvm.experimental.get.vector.length.i64(i64, i32 immarg, i1 immarg) #1 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: read) declare <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr captures(none), <vscale x 16 x i1>, i32) #2 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) declare <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1>, <vscale x 16 x i32>, <vscale x 16 x i32>, i32) #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.vector.reduce.add.nxv16i32(<vscale x 16 x i32>) #3 attributes #0 = { "target-features"="+v" } attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) } attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: read) } attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } !0 = distinct !{!0, !1, !2, !3} !1 = !{!"llvm.loop.isvectorized", i32 1} !2 = !{!"llvm.loop.isvectorized.tailfoldingstyle", !"evl"} !3 = !{!"llvm.loop.unroll.runtime.disable"} !4 = distinct !{!4, !3, !1}
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