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llvm source #1
Output
Compile to binary object
Link to binary
Execute the code
Intel asm syntax
Demangle identifiers
Verbose demangling
Filters
Unused labels
Library functions
Directives
Comments
Horizontal whitespace
Debug intrinsics
Compiler
clang (assertions trunk)
clang (trunk)
clang 10.0.0
clang 10.0.1
clang 11.0.0
clang 11.0.1
clang 12.0.0
clang 12.0.1
clang 13.0.0
clang 14.0.0
clang 15.0.0
clang 16.0.0
clang 17.0.1
clang 18.1.0
clang 19.1.0
clang 4.0.1
clang 5.0.0
clang 6.0.0
clang 7.0.0
clang 8.0.0
clang 9.0.0
llc (assertions trunk)
llc (trunk)
llc 10.0.0
llc 10.0.1
llc 11.0.0
llc 11.0.1
llc 12.0.0
llc 12.0.1
llc 13.0.0
llc 14.0.0
llc 15.0.0
llc 16.0.0
llc 17.0.1
llc 18.1.0
llc 19.1.0
llc 3.2
llc 3.3
llc 3.9.1
llc 4.0.0
llc 4.0.1
llc 5.0.0
llc 6.0.0
llc 7.0.0
llc 8.0.0
llc 9.0.0
opt (assertions trunk)
opt (trunk)
opt 10.0.0
opt 10.0.1
opt 11.0.0
opt 11.0.1
opt 12.0.0
opt 12.0.1
opt 13.0.0
opt 14.0.0
opt 15.0.0
opt 16.0.0
opt 17.0.1
opt 18.1.0
opt 19.1.0
opt 3.2
opt 3.3
opt 3.9.1
opt 4.0.0
opt 4.0.1
opt 5.0.0
opt 6.0.0
opt 7.0.0
opt 8.0.0
opt 9.0.0
Options
Source code
define void @load_i64_stride6_vf8(<48 x i64>* %in.vec, <8 x i64>* %out.vec0, <8 x i64>* %out.vec1, <8 x i64>* %out.vec2, <8 x i64>* %out.vec3, <8 x i64>* %out.vec4, <8 x i64>* %out.vec5) nounwind { %wide.vec = load <48 x i64>, <48 x i64>* %in.vec, align 32 tail call void asm sideeffect "# LLVM-MCA-BEGIN", "~{dirflag},~{fpsr},~{flags}"() %strided.vec0 = shufflevector <48 x i64> %wide.vec, <48 x i64> poison, <8 x i32> <i32 0, i32 6, i32 12, i32 18, i32 24, i32 30, i32 36, i32 42> %strided.vec1 = shufflevector <48 x i64> %wide.vec, <48 x i64> poison, <8 x i32> <i32 1, i32 7, i32 13, i32 19, i32 25, i32 31, i32 37, i32 43> %strided.vec2 = shufflevector <48 x i64> %wide.vec, <48 x i64> poison, <8 x i32> <i32 2, i32 8, i32 14, i32 20, i32 26, i32 32, i32 38, i32 44> %strided.vec3 = shufflevector <48 x i64> %wide.vec, <48 x i64> poison, <8 x i32> <i32 3, i32 9, i32 15, i32 21, i32 27, i32 33, i32 39, i32 45> %strided.vec4 = shufflevector <48 x i64> %wide.vec, <48 x i64> poison, <8 x i32> <i32 4, i32 10, i32 16, i32 22, i32 28, i32 34, i32 40, i32 46> %strided.vec5 = shufflevector <48 x i64> %wide.vec, <48 x i64> poison, <8 x i32> <i32 5, i32 11, i32 17, i32 23, i32 29, i32 35, i32 41, i32 47> tail call void asm sideeffect "# LLVM-MCA-END", "~{dirflag},~{fpsr},~{flags}"() store <8 x i64> %strided.vec0, <8 x i64>* %out.vec0, align 32 store <8 x i64> %strided.vec1, <8 x i64>* %out.vec1, align 32 store <8 x i64> %strided.vec2, <8 x i64>* %out.vec2, align 32 store <8 x i64> %strided.vec3, <8 x i64>* %out.vec3, align 32 store <8 x i64> %strided.vec4, <8 x i64>* %out.vec4, align 32 store <8 x i64> %strided.vec5, <8 x i64>* %out.vec5, align 32 ret void }
analysis source #2
Output
Compile to binary object
Link to binary
Execute the code
Intel asm syntax
Demangle identifiers
Verbose demangling
Filters
Unused labels
Library functions
Directives
Comments
Horizontal whitespace
Debug intrinsics
Compiler
OSACA (0.6.1)
llvm-mca (assertions trunk)
llvm-mca (trunk)
Options
Source code
vbroadcastsd ymm9, xmm9 vbroadcastsd ymm10, xmm10 vbroadcastsd ymm11, xmm11 vmovlhps xmm8, xmm0, xmm1 # xmm8 = xmm0[0],xmm1[0] vunpcklpd ymm12, ymm5, ymm2 # ymm12 = ymm5[0],ymm2[0],ymm5[2],ymm2[2] vpermpd ymm12, ymm12, 196 # ymm12 = ymm12[0,1,0,3] vblendps ymm8, ymm8, ymm12, 240 # ymm8 = ymm8[0,1,2,3],ymm12[4,5,6,7] vmovlhps xmm12, xmm7, xmm6 # xmm12 = xmm7[0],xmm6[0] vunpcklpd ymm13, ymm3, ymm15 # ymm13 = ymm3[0],ymm15[0],ymm3[2],ymm15[2] vpermpd ymm13, ymm13, 196 # ymm13 = ymm13[0,1,0,3] vblendps ymm12, ymm12, ymm13, 240 # ymm12 = ymm12[0,1,2,3],ymm13[4,5,6,7] vbroadcastsd ymm13, xmm13 vunpckhpd xmm0, xmm0, xmm1 # xmm0 = xmm0[1],xmm1[1] vunpckhpd ymm10, ymm10, ymm2 # ymm10 = ymm10[1],ymm2[1],ymm10[3],ymm2[3] vblendps ymm8, ymm0, ymm10, 240 # ymm8 = ymm0[0,1,2,3],ymm10[4,5,6,7] vunpckhpd xmm6, xmm7, xmm6 # xmm6 = xmm7[1],xmm6[1] vunpckhpd ymm9, ymm9, ymm15 # ymm9 = ymm9[1],ymm15[1],ymm9[3],ymm15[3] vblendps ymm9, ymm6, ymm9, 240 # ymm9 = ymm6[0,1,2,3],ymm9[4,5,6,7] vunpcklpd ymm6, ymm5, ymm13 # ymm6 = ymm5[0],ymm13[0],ymm5[2],ymm13[2] vmovlhps xmm10, xmm4, xmm7 # xmm10 = xmm4[0],xmm7[0] vblendps ymm10, ymm10, ymm6, 240 # ymm10 = ymm10[0,1,2,3],ymm6[4,5,6,7] vunpcklpd ymm6, ymm3, ymm11 # ymm6 = ymm3[0],ymm11[0],ymm3[2],ymm11[2] vmovlhps xmm11, xmm0, xmm1 # xmm11 = xmm0[0],xmm1[0] vblendps ymm11, ymm11, ymm6, 240 # ymm11 = ymm11[0,1,2,3],ymm6[4,5,6,7] vunpckhpd xmm4, xmm4, xmm7 # xmm4 = xmm4[1],xmm7[1] vunpckhpd ymm5, ymm5, ymm6 # ymm5 = ymm5[1],ymm6[1],ymm5[3],ymm6[3] vpermpd ymm5, ymm5, 100 # ymm5 = ymm5[0,1,2,1] vblendps ymm4, ymm4, ymm5, 240 # ymm4 = ymm4[0,1,2,3],ymm5[4,5,6,7] vunpckhpd xmm0, xmm0, xmm1 # xmm0 = xmm0[1],xmm1[1] vunpckhpd ymm3, ymm3, ymm14 # ymm3 = ymm3[1],ymm14[1],ymm3[3],ymm14[3] vpermpd ymm3, ymm3, 100 # ymm3 = ymm3[0,1,2,1] vblendps ymm0, ymm0, ymm3, 240 # ymm0 = ymm0[0,1,2,3],ymm3[4,5,6,7] vmovlhps xmm3, xmm7, xmm1 # xmm3 = xmm7[0],xmm1[0] vunpcklpd ymm2, ymm2, ymm6 # ymm2 = ymm2[0],ymm6[0],ymm2[2],ymm6[2] vpermpd ymm2, ymm2, 196 # ymm2 = ymm2[0,1,0,3] vblendps ymm2, ymm3, ymm2, 240 # ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7] vunpcklpd ymm13, ymm15, ymm14 # ymm13 = ymm15[0],ymm14[0],ymm15[2],ymm14[2] vpermpd ymm13, ymm13, 196 # ymm13 = ymm13[0,1,0,3] vmovlhps xmm15, xmm3, xmm5 # xmm15 = xmm3[0],xmm5[0] vblendps ymm13, ymm15, ymm13, 240 # ymm13 = ymm15[0,1,2,3],ymm13[4,5,6,7] vbroadcastsd ymm15, xmm15 vunpckhpd ymm6, ymm15, ymm6 # ymm6 = ymm15[1],ymm6[1],ymm15[3],ymm6[3] vunpckhpd xmm1, xmm7, xmm1 # xmm1 = xmm7[1],xmm1[1] vblendps ymm1, ymm1, ymm6, 240 # ymm1 = ymm1[0,1,2,3],ymm6[4,5,6,7] vbroadcastsd ymm6, xmm6 vunpckhpd ymm6, ymm6, ymm14 # ymm6 = ymm6[1],ymm14[1],ymm6[3],ymm14[3] vunpckhpd xmm3, xmm3, xmm5 # xmm3 = xmm3[1],xmm5[1] vblendps ymm3, ymm3, ymm6, 240 # ymm3 = ymm3[0,1,2,3],ymm6[4,5,6,7]
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