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cuda source #1
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Debug intrinsics
Compiler
10.0.0 sm_75 CUDA-10.2
10.0.1 sm_75 CUDA-10.2
11.0.0 sm_75 CUDA-10.2
16.0.0 sm_90 CUDA-11.8
17.0.1(libc++) sm_90 CUDA-12.1
18.1.0(libc++) sm_90 CUDA-12.3.1
19.1.0 sm_90 CUDA-12.5.1
20.1.0 sm_90 CUDA-12.5.1
20.1.0 sm_90 CUDA-12.6.1
20.1.0 sm_90 CUDA-12.6.2
20.1.0 sm_90 CUDA-12.8.1
20.1.0 sm_90 CUDA-12.9.0
20.1.0 sm_90 CUDA-12.9.1
NVCC 10.0.130
NVCC 10.1.105
NVCC 10.1.168
NVCC 10.1.243
NVCC 10.2.89
NVCC 11.0.2
NVCC 11.0.3
NVCC 11.1.0
NVCC 11.1.1
NVCC 11.2.0
NVCC 11.2.1
NVCC 11.2.2
NVCC 11.3.0
NVCC 11.3.1
NVCC 11.4.0
NVCC 11.4.1
NVCC 11.4.2
NVCC 11.4.3
NVCC 11.4.4
NVCC 11.5.0
NVCC 11.5.1
NVCC 11.5.2
NVCC 11.6.0
NVCC 11.6.1
NVCC 11.6.2
NVCC 11.7.0
NVCC 11.7.1
NVCC 11.8.0
NVCC 12.0.0
NVCC 12.0.1
NVCC 12.1.0
NVCC 12.2.1
NVCC 12.3.1
NVCC 12.4.1
NVCC 12.5.1
NVCC 12.6.1
NVCC 12.6.2
NVCC 12.8.1
NVCC 12.9.0
NVCC 12.9.1
NVCC 13.0.0
NVCC 13.0.1
NVCC 13.0.2
NVCC 13.1.0
NVCC 13.1.1
NVCC 13.2.0
NVCC 13.3.0
NVCC 9.1.85
NVCC 9.2.88
NVRTC 11.0.2
NVRTC 11.0.3
NVRTC 11.1.0
NVRTC 11.1.1
NVRTC 11.2.0
NVRTC 11.2.1
NVRTC 11.2.2
NVRTC 11.3.0
NVRTC 11.3.1
NVRTC 11.4.0
NVRTC 11.4.1
NVRTC 11.5.0
NVRTC 11.5.1
NVRTC 11.5.2
NVRTC 11.6.0
NVRTC 11.6.1
NVRTC 11.6.2
NVRTC 11.7.0
NVRTC 11.7.1
NVRTC 11.8.0
NVRTC 12.0.0
NVRTC 12.0.1
NVRTC 12.1.0
NVRTC 12.2.1
NVRTC 12.3.1
NVRTC 12.4.1
NVRTC 12.5.1
NVRTC 12.6.1
NVRTC 12.6.2
NVRTC 12.8.1
NVRTC 12.9.0
NVRTC 12.9.1
NVRTC 13.0.0
NVRTC 13.0.1
NVRTC 13.0.2
NVRTC 13.1.0
NVRTC 13.1.1
NVRTC 13.2.0
NVRTC 13.3.0
SCALE NVCC (AMD) 1.7.1
SCALE NVCC (AMD) 1.7.2
SCALE NVCC (NVIDIA) 1.7.1
SCALE NVCC (NVIDIA) 1.7.2
clang 7.0.0 sm_70 CUDA-9.1
clang 8.0.0 sm_75 CUDA-10.0
clang 9.0.0 sm_75 CUDA-10.1
clang rocm-10.0.0
clang rocm-4.5.2
clang rocm-5.0.2
clang rocm-5.1.3
clang rocm-5.2.3
clang rocm-5.3.2
clang rocm-5.7.0
clang rocm-6.0.2
clang rocm-6.1.2
clang rocm-6.2.4
clang rocm-6.3.3
clang rocm-6.4.0
clang rocm-7.0.1
clang rocm-7.0.2
clang rocm-7.1.0
clang rocm-7.1.1
clang rocm-7.14.0
clang rocm-7.2.0
clang rocm-7.2.1
clang staging rocm-10.0.0
clang staging rocm-6.1.2
clang staging rocm-6.2.4
clang staging rocm-6.3.3
clang staging rocm-6.4.0
clang staging rocm-7.0.1
clang staging rocm-7.0.2
clang staging rocm-7.1.0
clang staging rocm-7.1.1
clang staging rocm-7.14.0
clang staging rocm-7.2.0
clang staging rocm-7.2.1
clang trunk rocm-10.0.0
clang trunk rocm-6.1.2
clang trunk rocm-6.2.4
clang trunk rocm-6.3.3
clang trunk rocm-6.4.0
clang trunk rocm-7.0.1
clang trunk rocm-7.0.2
clang trunk rocm-7.1.0
clang trunk rocm-7.1.1
clang trunk rocm-7.14.0
clang trunk rocm-7.2.0
clang trunk rocm-7.2.1
trunk sm_120a CUDA-13.0.0
trunk sm_120a CUDA-13.0.1
trunk sm_120a CUDA-13.0.2
trunk sm_120a CUDA-13.1.0
Options
Source code
#define CEIL_DIV(value, divisor) (((value) + (divisor) - 1) / (divisor)) __global__ void sgemm_tiled_shared(const float* __restrict__ A, const float* __restrict__ B, float* __restrict__ C, int M, int N, int K, float alpha, float beta) { const int TILE_SIZE = 32; // Allocate shared memory __shared__ float sharedA[TILE_SIZE * TILE_SIZE]; __shared__ float sharedB[TILE_SIZE * TILE_SIZE]; // Identify the tile of C this thread block is responsible for (We assume tiles are same size as block) const uint block_row = blockIdx.y; const uint block_column = blockIdx.x; // Calculate position of thread within tile (Remapping from 1-D to 2-D) const uint ty = threadIdx.x / TILE_SIZE; // (0, TILE_SIZE-1) const uint tx = threadIdx.x % TILE_SIZE; // (0, TILE_SIZE-1) // Move pointers from A[0], B[0] and C[0] to the starting positions of the tile A += block_row * TILE_SIZE * N; // Move pointer (block_row * TILE_SIZE) rows down B += block_column * TILE_SIZE; // Move pointer (block_column * TILE_SIZE) columns to the right C += (block_row * TILE_SIZE * K) + (block_column * TILE_SIZE); // Move pointer (block_row * TILE_SIZE * K) rows down then (block_column * TILE_SIZE) columns to the right // Calculate how many tiles we have const uint num_tiles = CEIL_DIV(N, TILE_SIZE); float cumulative_sum = 0.0f; // Iterate over tiles (Phase 1: Loading data) for (int t = 0; t < num_tiles; t++) { sharedA[ty * TILE_SIZE + tx] = A[ty * N + tx]; sharedB[ty * TILE_SIZE + tx] = B[ty * K + tx]; // Barrier synchronisation until all threads load smem tiles __syncthreads(); // Phase 2: Compute partial results iteratively for (int i = 0; i < TILE_SIZE; i++) { cumulative_sum += sharedA[ty * TILE_SIZE + i] * sharedB[i * TILE_SIZE + tx]; } // Barrier synchronisation until all threads finish writing to smem __syncthreads(); // Move all pointers to the starting positions of the next tile A += TILE_SIZE; // Move right B += TILE_SIZE * K; // Move down } // Write results back to C C[ty * K + tx] = (alpha * cumulative_sum) + (beta * C[ty * K + tx]); }
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